Hi Trond,

I'm not totally sure how you worked out the circuit with the beta helpers to get all transistors work in saturation. From my viewpoint you still need on each branch at least 2 VTH + 2 VDSATS, which hadrly fits into 1.2v.
Nevertheless, a significant difference between both circuits is the high impedance node seen at the beta helper gate node, while in the original circuit such impedance was 1/gm.
In the beta helper circuit I envision such high impedance will bring a non-dominant pole down to the low frequencies in combination with the gate capacitance now hanging from that node.
Hope this helps

Tosei

Hi nobody,

The beta helper is in fact a source follower stage. Therefore it introduces positive feedback from gate to source, such feedback having a gain < 1.

However, I do not see why the impedance on the gate node would be 1/(A*gm). In any case I would expect it to be 1/(A*ro), with A < 1 and ro the output impedance of the cascode.

I do not see how the beta helper could work as a common source amplifier, since there is zero load at the drain and therefore the gain is 0 under this configuration + the drain is not an output for the beta helper stage.

As for the original CKT I agree is a High swing cascode and M1 will be in saturation, but according to Trond his problem is the pass transistors not being in saturation rather than the othe ones.

Regards
Tosei

Hi, Tosei

Here is how I derive the impedace.
Add a test current It and a test voltage Vt @ gate of the source follower, which is also drain of M7. Then the gate voltage of M8 is A*Vt where A represents the gain of source follower. KCL @ gate of the source follower. A*Vt*gm8=It . Therefore, Rt=1/(A*gm8).

You are right about the gain of the source follower, which is supposed to lower than 1.
As the common source amplifier, I am confused about the righ handed side beta helper because the arrow seems to be wrong for me.
I am not sure about what problem came up in Trond's CKT and I would guess it is probably due to a doublet on the current mirror.

Thank you all for your feedback so far.

rja.cedt

1) I decided to use cascoded current mirrors as the transistor output impedence was the major limitation in obtaining a "constant" gm (even with an ideal resistor).
2) Agreed, I could try adjusting the bias separately and maybe removing one cascode. So far I have mainly considered to circuit shown though. Essentially there is some information in Johns/Martin "Analog Integrated Circuit Design" book on page 259. This seemed a good starting point.

Nobody
1) The arrow of the beta helper in the picture is indeed wrong. The circuit's correct though.
2) I verified that the impedance seen at the gate of the beta helper is pretty much the same as without it. As Nobody pointed out already, due to the SF stage the impedance only slightly increases. The gain of the SF was determined to be ~ -1dB in simulation.

So why are we seeing a peaking in the OPEN loop TF? Is it because a SF as a negative input resistance at high frequenies of -gm/(CgsCLw^2)? Is it because a SF can have an inductive output impedance?


Cheers,

hi THE CHOPPER,
                               as you said in your earlier post, by increasing  the size of beta helper we can reduce inductance at the source,i tried i did not get any improvement(i guess the reason is  -ve resistance at the gate of beta helper is also increasing). But i think   problem is coming because  of  the poles at the  source of M8 is moving to complex plane due to -ve feedback around the loop.
          But i have one basic question regarding stability,how to know which loop is causing problem(because in our problem we have around 2 -ve feedback,1 +ve feedback).is there any way to figure out this problem

Thank you.
                       

hi buddypoor,
                    Thanks for your answer,if you consider the above beta helper circuit, there everybody is raising different issues for oscillations  like 1.inductance of the source follower  output,-ve resistance from the source,complex poles in the -ve feedback loop .....Finally which one is the dominant   culprit. Intuitively what i feel is  if inductance and -ve resistance are belonged to  same node then u can expect   ringing(i  am saying this one from a well known example of ource follower driving another source follower).so kindly please tell  sme why oscillations are coming here.
Thank you.

               
               
               
             
               
             
           

buddypoor wrote on Nov 6^th, 2008, 2:39am:

I was under the impression that even though the stability of each loop is a necessary if not sufficient condition of total stability, in practical circuits, if each loop by itself is stable, it tends to make the overall system stable.

With that in mind, the solution for Trond would be to run three different stb analysis (if using spectre) for the three loops.  From there, he could stabilize each one sufficiently.  I believe that is the same solution that the previous post by Prabhu put forth.