Hi,

In fact, we should consider the gradient doping over the wafer.

First of all Vt is not only dependant on the gate oxide thickness according to the equation stated below since the substrate doping Na is  also involved. (Since if you want to switch from accumulation region to inversion you need enough substrate-doping dependant charges  underneath the gate to compensate for the positive charge above the gate)

Second, the doping also affect in various way the drift and (to a lower extent in MOS technology) diffusion currents, therefore: the transconductance - that render the speed at fixed parasitic capacitance - is varying.

Regards,

Tareeq

Quote:

I think this can be very misleading.  It would be physically impossible to have two different thicknesses of Tox for the PMOS and NMOS.  Because of that, the fs and sf corners are always pessimistic.  However, since the N's and P's have two different V_t adjust implant steps, the corners will be at least somewhat uncorrelated.  There still is some level of correlation since the V_t does depend on the thickness of the oxide during the implant step, however, for modeling purposes, they are always assumed to be fully uncorrelated, i.e. correlation coefficient of 0.

Assuming that the V_t's are uncorrelated, then the sf and fs corners are just as likely as the ss and ff corners in terms of V_t.  As mentioned above, though, the models present a capacitive loading situation that is not physically possible.  

At the heart of all of this is what parameter is most important to your particular circuit.  Some combinations for some parameters are unrealizable, but that does not discount those corners since an s or f corner does not mean one thing.