jbdavid
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Our house uses some VHDL on the digital side, on the analog side we use primarily Verilog | Verilog-AMS and Verilog-A..
If Cadence Virtuoso is your analog design environment, they have an excellent mixed signal simulation environment, if expensive. Many other simulators are supported in that environment too.. but the VHDL-AMS subset supported in the netlister had been somewhat limited to a subset of that language that was compatible with Verilog-AMS, and it was typically Verilog on top.. BUT My knowledge of all the workable permuations of that tool is out of date, so I'd talk to your cadence AE to see what they support... if you are using cadence icfb tools.
But you don't explain what design database type you are trying to use, so it's hard to make any suggestions.
Jonathan
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