vivkr
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Hi All,
I am trying to make a very low cutoff frequency filter (~ 1 Hz), and the choice is between using a gmC variant based on an active stage biased with very low current, and a MOS transistor biased for very large resistance with a capacitor. The whole idea of course is to make it with a small cap (~100 pF).
The gmC approach seems to work OK but introduces some offset, and I was thinking of using a MOS as a switch to get offset-free behavior.
However, the MOS obviously acts as a half-wave rectifier with this large cap when there are large out-of-band signals. This worsens the out-of-band suppression limiting it to about -40 dB which would be enough still, but this also introduces a large offset which is the consequence of the rectification process. It is the latter which is the problem.
Could someone suggest what one may do to minimize this large rectification-induced-offset? Or is this a fundamental limitation that I cannot get around?
Otherwise, I could make the MOS-C filter with far lower area than the gmC filter. For better linearity, I am controlling the gate drive to track the input signal.
Thanks,
Vivek
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