HI, I'm KangSub

I've been studying the design of PLL and CDR.

I want to know how to implement the digital loop filter in PLL or CDR.

Generally, charge-pump PLL is widely used. In CPPLL, charge pump and loop filter(R1+C1,C2) are used. I want to replace this analog loop filter as digital loop filter. but I don't know how to do that. In CDR, I want to do same replacement.


http://home.netcom.com/~chip.f/plls.htm

This is short article about digital loop filter and I found this type of digital loop filter in paper(Yehui Sun, "Analysis of Digital Bang-Bang Clock and Data Recovery for Multi-Gigabit/s Serial Transceivers", CICC, 2009)

But, I don't know how to connect the UP/DN signal to the this type of digital loop filter.

And, I studied the basic of z-transfrom and can understand the transfer function and can draw the frequency response by hand or using Matlab.  
But, when I draw the frequency response of that type of loop filter(Ki = Kp = 1), it was not the frequency response of the low pass filter. It may be because of the wrong value of Ki and Kp. How to decide the Ki and Kp?

The following is the Matlab code.
z = tf('z',0.1);
kp=1;
ki=1;
hz = kp + ki/(1-z^(-1));
ltiview

In summary,
1. How to implement the loop filter of PLL or CDR in a digital manner?
2. How to connect the UP/DN signal of PFD or PD to the digital loop filter?
3. How to decide the Ki and Kp of the loop filter above?
4. Can you recommend me the papers, books, or articles about that?

Thank you.

-KangSub

Thanks for your help, raja.cedt

After reading the paper, I'll comment about that.

hi,

If you wan to learn the basic of CDR, you can refer to the book of Razavi, "Design of Integrated Circuits for Optical Communications, McGrawHill",

and following papers,

http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.141.6264&rep=rep1&type=...

or

C.K. Yang and M.A. Horowitz, “A 0.8-um CMOS 2.5Gb/s Oversampling Receiver and Transmitter for Serial Links,” IEEE JSSC, vol. 31, pp. 2015-2023, Dec. 1996

hi KangSub,

i guess if you use alpha and beta as power of two you could use shift left and shift right operations for multiplication rather than putting a big multiplier. I didn't understand 2nd question like how to implement (use can use direct shift register for Kp implementation and one flop and Ki for another branch)