Hi Raja,
Thanks for the reply! Yes I was also thinking of explaining what I mean by OTA and OPAMP really before asking the questions. Lets use amp_hi as amplifier with high o/p impedance, and amp_lo for an amp with low o/p impedance.
In (3) you agree with the loading point but mention that one should go for 2-stage. But then the second stage has to be a buffer I guess to ensure low o/p impedance? [As you mentioned in point (1)].
So in summary I really cannot add poles-zeros by adding R,Cs across an amp_hi. I need to use an amp_lo? For example if you can look at this link:
http://www.intersil.com/data/an/an9415.pdf I just googled and found this. If you look at Fig 26 for example, that amplifier has to be an amp_lo, right?
Sorry if I am asking you the same thing again!
About the regulator design, the LDO works in silicon! But strangely it's phase margin is very poor, but still works!! Nevertheless, I was trying to improve it by employing some lead-lag network without modifying the error amp itself, when I observed this fundamental issue.
Thanks,
Rajdeep