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verilogA models for vertical and lateral bjt (pnp,npn) (Read 5329 times)

yvkrishna Senior Member Offline Posts: 117	verilogA models for vertical and lateral bjt (pnp,npn) Aug 11^th, 2012, 4:10am Hi, Please point me to verilogA models for bjts in cmos process. with the purpose being to explore the BGR sensitivity to poor beta,large base resistance and their �temperature dependence etc. Any other ways to analyse this are welcome. Thanks, yvkrishna
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Geoffrey_Coram

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Re: verilogA models for vertical and lateral bjt (pnp,npn)
Reply #1 - Aug 13^th, 2012, 5:44am

yvkrishna wrote on Aug 11^th, 2012, 4:10am:

Hi,
Please point me to verilogA models for bjts in cmos process.

Verilog-A is a modeling language; there are Verilog-A descriptions of Mextram, Hicum, and VBIC bipolar transistor models. But the "models" are just collections of equations; you would need the parameter values from some other source to model a BJT in a specific process.

If at first you do succeed, STOP, raise your standards, and stop wasting your time.

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