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How to simulate the phase noise of a divider connted to output of a VCO in PLL? (Read 1874 times)
yaoxy
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How to simulate the phase noise of a divider connted to output of a VCO in PLL?
Feb 16th, 2013, 9:34am
 
I am working on a PLL project. The phase noise of the VCO has been simulated. However, if I connect a divider to the output of the VCO, how to simualte impact the phase by the divider?

Thanks.
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