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Jacki

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Bad device in LVS check.
Jun 06^th, 2014, 3:25pm

Hi,
I am converting a layout design from old PDK to the new version. When I do the LVS, I get the warning "BAD DEVICE on layer ...". Previously I didn't have this warning. Also it seems with the new version PDK, LVS cannot distinguish the dummy transistors which are used to protected the core devices. Of course the LVS rules are updated to the new version also.
Can you please share your idea if anybody has this kind experiences and solutions?
Thank you.
Jacki

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Jacki

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Posts: 237

Re: Bad device in LVS check.
Reply #1 - Jun 17^th, 2014, 10:03am

I find the warning of the "BAD DEVICE" is in the extraction result in LVS check. And I guess this warning will fail the tapeout since it can cause the short circuit between the dummy device and its protected circuit due to the breakdown. I try to remove the dummy devices in the layout, then LVS is passed and there is no extraction warning in the LVS check. I am really confused if the dummy device has the problem of breakdown, it should be reported in the DRC (I assume the problem is due to the antenna check), but now it is reported in LVS. Anybody can help or give me some hints?
Thank you.
Jacki

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Jacki

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Posts: 237

Re: Bad device in LVS check.
Reply #2 - Jun 17^th, 2014, 3:56pm

According to the definition of BAD DEVICE in Calibre, it seems the Calibre LVS cannot recognize the BAD DEVICE because of the bad connection or the layout shape. Does it mean if the layout includes the "BAD DEVICE", then during the fabrication, the machine cannot recognize the "BAD DEVICE" either, and the process will be in a wrong way?
Can anybody comment it?
Thank you.
Jacki.

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Jacki Senior Member Offline Posts: 237	Re: Bad device in LVS check. Reply #3 - Jun 18^th, 2014, 1:28pm Somebody gives me a hint, the dummy device in hot well could short the circuit, but my case is not in the hot well. I don't have any hot wells, also the problem also happens on NMOS transistors.
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Jacki Senior Member Offline Posts: 237	Re: Bad device in LVS check. Reply #4 - Jun 22^nd, 2014, 2:26pm From the simulation check, the possible short could happen between the gate and source of the protected devices (MOS) due to the "BAD DEVICE" which is the dummy MOS and connected to the source of the protected devices. Nobody has this experience before?
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Jacki Senior Member Offline Posts: 237	Re: Bad device in LVS check. Reply #5 - Jun 22^nd, 2014, 4:03pm I will do the on-chip test later using probe station, if the shift register still works in a wrong way, probably I can conclude it has short circuit inside the chip.
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