Hi,

   I am blocked by a strange issue in the layout. As shown in the figure below, I try to use poly-silicon resistors to build up my resistive array. When the width W is smaller than 1um, I can get the contact via between poly and metal 1. But when the width of resistor is equal to or larger than 1um, the contact via is missing, instead there is a cross region which is marked by layer "CABAR". The contact via between metal 1 and poly is layer "CA". That means even I cannot add the via by hand in that cross region, or else I cannot pass the DRC check.
   Does anybody have this problem before? Can you please give me some tips to avoid this problem? Anyway this problem is very strange, it is my first to face it.
   Thank you.
   Jacki

Jacki,
it looks as if the technology uses different layers for contacts and contact arrays.
- B O E
PS: This is just an educeted guess, given that I don't know your tech.