wandola wrote on Sep 8th, 2014, 6:50pm:I believe 18-bit SAR ADC is super challenging. You can sell this thing to ADI, or publish ISSCC paper like crazy...
You definitely need to use subranging type and combine 2 10-bit or 10b+9b to realize the 18-bit resolution overall.
Each ADC needs to be calibrated. I think the gain and offset mismatch between the two ADCs also need calibration.
65nm or 40 nm from UMC or tsmc will be a good platform for this kind of design.
a sub ranging 2 step structure will require the front end to be good to 18 bits or you will lose the accuracy in two step process errors.
this is not going to be easy, the common methods at this rate resolution tend to be oversampling or integrating-counter systems. However that multiplexing requirement may make those methods a show stopper