Go,TB
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Posts: 11

Hello, all
The paper with title “A methodology for the offsetsimulation of comparators” posted on this forum has been largely referred for comparator offset simulation setup. Then I have a couple of questions regarding the postprocessing methodology inside this paper.
For example, I run 1000run MonteCarlo to the comparator with step ramp signal at input. At each ramp step, the comparator will be activated to generate the large signal output (0 or VDD, e.g.). For each run and each step, the input signal voltage value and matched output results are collected.
Then I will wonder if I can characterize the offset voltage by a way other than presented by the paper?
For each run, the value of input signal that can trip the comparator for the first time during the whole input ramp will be recorded. Basically, the input voltage should be the sum of nominal vth + voffset. Then I will have 1000 numbers at hand after simulation. Doing a simple statistical analysis will easily generate the mean value and its 1sigma value. The mean value is the nominal vth and 1sigma value the voffset of our interest.
This way we don’t need to go through the complex postprocessing as in the paper. Please correct me if my methodology is flawed.
Thanks!
