spectrallypure
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Hi! I'm having a hard time trying to figure how to implement the on-chip decoupling of the various power domains in my chip. I am implementing a 1GSa/s pipeline ADC in a bulk CMOS process with deep N-well option. The chip floorplan is shown in Fig. 1, and the floorplan of each pipeline stage is shown in Fig. 2. As shown in these figures, I have the following 5 different power domains (please note that besides the logic used for clock signals generation and distribution, I have no other digital circuitry in my chip; all processing/calibration will be done off-chip):
-Vdd_A,Vss_A: the amplifiers power domain, -Vdd_SW,Vss_SW: the bootstrapped switches power domain, -Vdd_CMP,Vss_CMP: the comparators power domain, -Vdd_D,Vss_D: the clock signals generation, buffering and distribution power domain, and -Vdd_IO,Vss_IO: the output buffers power domain (***I'll make no further reference to this domain since it has already been decided that it will be kept completely isolated from the other 4).
Wherever it happens, each power domain is implemented and contained in a separate deep-N-well region, so in principle all the power domains are isolated to each other (looking back this might not have been the most clever decision, but the core of the ADC has already been laid out like this). Now I need to implement the onchip decoupling of all these power domains, and I'm considering the following 2 options:
OPTION "A": keep all the domains separate and independent.- A simplified diagram of this option is shown in Fig. 3, and its corresponding decoupling scheme in Fig. 4. As can be seen from these figures, the Vdd and Vss of each domain are decoupled with respect to each other, but no connection/decoupling is implemented between the domains. I believe the pros and cons of this option are: -Pros: domains completely independent --> maximum isolation -Cons: domains don't share a common reference --> they could "bounce" relative to each other and induce errors!
OPTION "B": short the grounds of all the power domains.- A diagram of this option is shown in Fig. 5, and its corresponding decoupling scheme in Fig. 6. Now the domains share a common ground and the Vdd of each domain is decoupled with respect to it. -Pros: domains share a common reference --> they all would "bounce" together (is this actually a "pro"?) -Cons: I am shorting the regions that I originally intended to be isolated! (i.e. "local p-sub" regions inf Fig. 5). Even worse, if I also connect the substrate to the common ground (which I most certainly would), then I would be in effect shorting the regions at each side of the deep-N-wells, defying their presence and purpose as "isolation walls" between these regions! (i.e. why would I have put these walls to begin with, if I was going to short electrically the regions they are separating?).
I would really appreciate if anybody could please share any thoughts on this problem. What do you think would be the best option to take? Or maybe non of the above described?
Thanks in advance for any help/advice/comments.
Cheers,
Jorge.
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