I am trying to design a type-I PLL.

I am running phase noise simulation for the ndivider and phase detector. However, I encountered a very stranger problem for both circuits.

I setup different corners. (process corner + LT/HT + LV/HV). In total there are around 20 corners.

The PSS/Pnoise simulations completed without convergence issues. However, the phase noise for most corners are very close (+/-1dB). But for some corners, the PN is very strange. It could be 20/30dB higher than those correct ones.

I tried to run transient simulation, there was no obvious problem with the ckt behaviour.

does anyone encounter this before. What has really happened.??