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how to build pll noise model based on verilog-a using Ken Kundert‘s method? (Read 11448 times)
lwzunique
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #15 - Jan 18th, 2017, 8:45pm
 
cheap_salary wrote on Jan 18th, 2017, 8:36pm:
Do you surely set nonzero value noise ?
If n is equal to zero, noise is not generated.

I set the value of n, at now, i don't know how to set it correctly, I can get the equivalent output noise, the result is wrong. I will have further study about it.
thanks for your help, and really sorry for my carelessness, I am a newbie, sometimes something is really difficult for me. thanks again!
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #16 - Jan 19th, 2017, 4:34am
 
Ken Kundert wrote on Jan 18th, 2017, 4:00pm:
The '{...} form is recommended in the latest Verilog-AMS LRM.
It is something they picked up recently from SystemVerilog.
This means that Verilog has two form for array literals,
you can either use '{...} or {...}.
The former represents packed arrays and the latter represents unpacked arrays.
The '{...} form did not exist when Verilog-AMS first came out,
so early versions of Verilog-AMS and Spectre only support the {...} form.
Thanks for explanations.

Ken Kundert wrote on Jan 18th, 2017, 4:00pm:
I suspect that the more recent versions of Spectre are requiring the use of the '{...} form when specifying the array values to the laplace, zi, and table functions.
I confirmed both '{...} and {...} in Cadence Spectre 14.1.
There are no warning and error for both of them.
And results are same.

Cadence Spectre 14.1 accepts both '{...} and {...}.
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #17 - Jan 19th, 2017, 4:36am
 
lwzunique wrote on Jan 18th, 2017, 7:51pm:
another problem is that,
I want to simulate the noise of single VCO block,
it can't work.
Show me Spectre Netlist and Verilog-A code for VCO.
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lwzunique
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #18 - Jan 19th, 2017, 4:14pm
 
this figure is the phase noise of real vco.
and the code is:
Code:
// VerilogA for pllphasenoise, vco, veriloga

`include "constants.vams"
`include "/home/wzliu/project/phase.vams" // from Listing 2, includes disciplines.vams.


module vco(in, out);
input in; output out;
voltage in;
phase out;
parameter real gain = 40e6 from (0:inf); // transfer gain, Kvco (Hz/V)
parameter real n = 50 from [0:inf); // white output phase noise at 1 Hz (rad2/Hz)
parameter real fc = 500K from [0:inf); // flicker noise corner frequency (Hz)
analog begin
Theta(out) <+ 2*`M_PI*gain*idt(V(in));
Theta(out) <+ flicker_noise(n, 2, "wpn") + flicker_noise(n*fc, 3, "fpn");
end
endmodul 


I can't understand rad2/Hz, what is the relationship between rad2/Hz and dBc/Hz?
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #19 - Jan 19th, 2017, 4:21pm
 
Show me Spectre Netlist of giving convergence error.
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #20 - Jan 19th, 2017, 4:26pm
 
vco-test schematic and the simulation log output.
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #21 - Jan 19th, 2017, 4:30pm
 
Show me Spectre Netlist.

lwzunique wrote on Jan 19th, 2017, 4:14pm:
I can't understand rad2/Hz, what is the relationship between rad2/Hz and dBc/Hz?
Surely see all equations in Ken's Document.
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #22 - Jan 19th, 2017, 4:33pm
 
cheap_salary wrote on Jan 19th, 2017, 4:30pm:
Show me Spectre Netlist.

lwzunique wrote on Jan 19th, 2017, 4:14pm:
I can't understand rad2/Hz, what is the relationship between rad2/Hz and dBc/Hz?
Surely see all equations in Ken's Dovument.

Code:
// Generated for: spectre
// Generated on: Jan 20 08:10:38 2017
// Design library name: pllphasenoise
// Design cell name: vco_test
// Design view name: schematic
simulator lang=spectre
global 0

// Library name: pllphasenoise
// Cell name: vco_test
// View name: schematic
I0 (net3 net1) vco gain=4e+07 n=50 fc=500000
V0 (net3 0) vsource dc=1 type=dc
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
    tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
    digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
    checklimitdest=psf
noise ( net1 0 ) noise start=1 stop=10M annotate=status
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts  where=rawfile
saveOptions options save=allpub
ahdl_include "/home/wzliu/project/fm394_wzliu.Work/pllphasenoise/vco/veriloga/veriloga.va" 


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Ken Kundert
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #23 - Jan 19th, 2017, 5:52pm
 
rad2/Hz means radians2/Hertz.

A VCO has no dc solution, so you should skip the dc analysis (specify 'skip dc' to the transient analysis).

-Ken
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lwzunique
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #24 - Jan 19th, 2017, 6:33pm
 
in the paper: SΦ(Δf) is power density of phase, and L(Δf) is phase noise that we can get by doing pss and pnoise to a real vco, is this right?
and calculation of n and fc is based on the result of pss+pnoise.
how to use equation 21,26,29 to calculate n?
what does the fΔ in equation 25 mean? corner frequency, is it fc?
if i choose a Δf that is well above fΔ and well below fo, n=cfo^2*pi=L(Δf)*Δf^2*2,is this right?
in the figure below, at frequency 10^5Hz, the slope changes from -30dB to 20 dB, so fc is 10^5 Hz.
I choose Δf=100M  to do the calculation. n= 2*10^(L(100M)/10)*2*(100M)^2=1.32.
then veriloga model of VCO is:
Code:
// VerilogA for pllphasenoise, vco, veriloga

`include "constants.vams"
`include "/home/wzliu/project/phase.vams" // from Listing 2, includes disciplines.vams.


module vco(in, out);
input in; output out;
voltage in;
phase out;
parameter real gain = 40e6 from (0:inf); // transfer gain, Kvco (Hz/V)
parameter real n = 1.32 from [0:inf); // white output phase noise at 1 Hz (rad2/Hz)
parameter real fc = 100K from [0:inf); // flicker noise corner frequency (Hz)
analog begin
Theta(out) <+ 2*`M_PI*gain*idt(V(in));
Theta(out) <+ flicker_noise(n, 2, "wpn") + flicker_noise(n*fc, 3, "fpn");
end
endmodule 

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lwzunique
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Re: how to build pll noise model based on verilog-a using Ken Kundert‘s method?
Reply #25 - Jan 19th, 2017, 6:35pm
 
after i changed the veriloga of vco, I mean the parameter of n and fc, the single vco block can be simulated.
the result is as below.
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