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creating compile time define switch in .scs file (Read 2809 times)
AMS_ei
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creating compile time define switch in .scs file
Apr 17th, 2017, 11:50pm
 
Hi,

I am planning to have a switch in order to have control in specific netlist or in .scs file.

Is there any way to apply a compile time define switch in .scs file? (something like `ifdef in system verilog/verilog ams)?

Thank you.

Kind regards
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Andrew Beckett
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Re: creating compile time define switch in .scs file
Reply #1 - Apr 21st, 2017, 1:32pm
 
Yes. Use the cpp (C pre-processor) directives #ifdef, #ifndef etc, and then run "spectre -Dvar" or "spectre -Dvar=val" to define them on the command line. You can also just run "spectre -E" to invoke with the C preprocessor first, which happens if you pass -D too.  More on cpp can be found in "man cpp".

Andrew
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AMS_ei
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Re: creating compile time define switch in .scs file
Reply #2 - Apr 25th, 2017, 5:46am
 
Hi Andrew,

Thank you for your valuable inputs.
Could you please tell me how can I pass it through "irun"?

Thank you.

Kind regards.
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Andrew Beckett
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Re: creating compile time define switch in .scs file
Reply #3 - May 28th, 2017, 2:35pm
 
Add this to the irun command line:

-spectre_args '-E -Dvar'

or:

-spectre_args '-E -Dvar=val'

Note that you have to pass the -E, because otherwise I think the -Dvar just gets passed to irun as a macro definition for the Verilog `ifdef etc.

Regards,

Andrew
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Re: creating compile time define switch in .scs file
Reply #4 - May 30th, 2017, 4:45am
 
Hi Andrew,
Thank you for your valuable inputs.
This seems to be not working if I insert amsd{} block in the amscf.scs file.
Is there any workaround for that?

Thank you.

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Andrew Beckett
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Re: creating compile time define switch in .scs file
Reply #5 - Jun 3rd, 2017, 12:37am
 
Something seems to be odd if you use #ifdef around or within the amsd block. My quick experiments seem to show that #ifndef works, but #ifdef doesn't. Odd...

I suggest that you contact Cadence Customer Support at http://support.cadence.com

Regards,

Andrew
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