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high frequency source VS. long rise time(parallel RC) in transient simulation (Read 748 times)
Peng_Li
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high frequency source VS. long rise time(parallel RC) in transient simulation
Aug 24th, 2018, 5:24am
 
Hi, the title is a brief description of the problem. Here are the details.
For simplicity, my circuit is composed of two parts, part 1 is a PULSE current souce in series with a resistor and a inductor, described in Verilog-A.
Part 2 is a parallel RC circuit, excited by another current source whose magintude is the dissipated power of part one, described in Verilog-A or SPICE.

There are connections between the two circuits.
Firstly, the dissipated power of part 1 is delivered to part 2 by a VCCS (voltage-controlled current source) module.
Secondly, the values of resistor and inductor in part 1 circuit varies with the node voltage VT1 in part 2 cirucit.

My problem is that, the PULSE current souce in part 1 circuit varies at high frequency (the period can be several nanoseconds), however, it takes a long time for the RC in part 2 circuit to rise up (the time can be several seconds). (specific values of RC is shown in the following code)
Actually, I tried to change the PULSE souce into a step source, to avoid this problem, and it worked (as shown in the following code). But I want to solve this problem eventually.

Is there any way to solve this problem? Maybe, delay the variation in part 1, using a counter within a if...else... block in verilog-A module of part 2 circuit?

Any help would be greatly appreciated.
Sincerely.

The code for each module is shown as follows.
step current source in HSPICE
Code:
.param v01=0 va1=1.9610e-03 td11=10 tau11=2.275 td21=500 tau21=20000
Istep10 0 nstep1 exp(v01 va1 td11 tau11 td21 tau21)
Xtop1 nstep1 0 npwr10 dt10 top_level
.TRAN 0.001 150 


PWL current source
Code:
Ipul1 0 n1 PULSE 0.000000e+00 1.961000e-03 0.000000e+00 8.570000e-10 8.570000e-10 2.713000e-09 7.140000e-09 


Top level module
Code:
module top_level (n1,n2,npwr,dt);
    
	inout n1,n2,npwr,dt;
	electrical n1,n2,npwr,dt;
	ground gnd;

	parameter real r = 0.0244;
	parameter real l = 1.3215e-12;

	parameter real rth = 3.0556e+08 	from [0:inf);
	parameter real cth = 3.0191e-08		from [0:inf);

	//source input from Hspice
	//instantiate 3 modules
	series_rl_power_rl_varywith_temp #(.r_ini(r), .l_ini(l)) series_rl_varypower(n1,n2,npwr,dt);  //Part 1 circuit
	vccs #(.gain(1.0)) vccs_4therm (gnd,dt,npwr,gnd);
	thermalpallrc #(.r(rth), .c(cth)) thermal_rc(dt,gnd);  //Part 2 circuit

endmodule 


Part 1 circuit
Code:
module series_rl_power_rl_varywith_temp (p, n, pwr, tin);	//Does this model work well for both v-source and I-source? to be tested
    
	parameter real r_ini = 0.0244;			// resistance (Ohms)
    parameter real l_ini = 1.3215e-12;		// inductance (H)

	parameter real p1 = 8.912e-05, p2 = 0.02432;	//fitted parameters for R_metal
	parameter real a = 1.338e-12, b = 1.534e-05, c = -1.699e-14, d = -0.01113;

	inout p, n;
	input tin;
	output pwr;
    electrical p, n, pwr, tin;
	ground gnd;

    analog begin
		V(p,n) <+ (p1*V(tin,gnd) + p2)*I(p,n) + (a*exp(b*V(tin,gnd)) + c*exp(d*V(tin,gnd)))*ddt(I(p,n));
		V(pwr,gnd) <+ V(p,n)*I(p,n);
    end
endmodule 


Part 2 circuit
Code:
module thermalpallrc (p, n);
    parameter real r=3.0556e+08 exclude 0;
    parameter real c=3.0191e-08;
    inout p, n;
    electrical p, n;

    analog begin
		I(p,n) <+ V(p,n)/r + ddt(c*V(p,n));
    end
endmodule 


VCCS
Code:
module vccs (p, n, ps, ns);
    parameter real gain=1.0;
    output p, n;
    input ps, ns;
    electrical p, n, ps, ns;

    analog begin
		I(p,n) <+ gain*V(ps,ns);
    end
endmodule 


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Peng_Li
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Re: high frequency source VS. long rise time(parallel RC) in transient simulation
Reply #1 - Aug 24th, 2018, 6:52am
 
Diagram of the circuits are shown here. [img][/img]
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diagram_EandT_toGenerateFigure_4.jpg
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Ken Kundert
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Re: high frequency source VS. long rise time(parallel RC) in transient simulation
Reply #2 - Aug 24th, 2018, 9:29am
 
Use PSS analysis to directly find the steady-state behavior.

-Ken
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Peng_Li
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Re: high frequency source VS. long rise time(parallel RC) in transient simulation
Reply #3 - Aug 26th, 2018, 7:45pm
 
Ken Kundert wrote on Aug 24th, 2018, 9:29am:
Use PSS analysis to directly find the steady-state behavior.


Thanks.
I didn't use PSS before. From Google results, it seems that the PSS analysis is mostly used in Cadence, and applied to oscillator in RF analysis.
Since I need to calculate the power of Part 1 circuit, and delivery the value of power to Part 2 circuit, I am not sure whether this can be done in Candence.
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