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Verilog-A : Behavioral model analyzer/optimizer (Read 266 times)
AS
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Verilog-A : Behavioral model analyzer/optimizer
Dec 05th, 2018, 4:38pm
 
Hello All,

Is there an analyzer mode in any spice simulator that can help with identification of
simulation speed bottlenecks in Verilog-A models?

Thanks,
AS
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Frank Wiedmann
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Re: Verilog-A : Behavioral model analyzer/optimizer
Reply #1 - Dec 7th, 2018, 2:06am
 
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Andrew Beckett
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Re: Verilog-A : Behavioral model analyzer/optimizer
Reply #2 - Dec 7th, 2018, 4:28am
 
Spectre has an "AHDL Linter". This can be turned on in ADE via Simulation->Options->Analog and is on the Miscellaneous tab. From the command line it's the -ahdllint option.

There are some static checks which will then appear in the normal simulator output log, and then some checks during simulation for potential performance issues or improvements (in ADE the Linter log can be shown from the Simulation menu).

Regards,

Andrew.
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