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Oct 25th, 2020, 12:16pm
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supply noise's influence on PLL (Read 289 times)
tulip
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supply noise's influence on PLL
Mar 17th, 2020, 8:13pm
 
In ADI's Analog Dialogue 45-09, "Power Management Deisng for PLLs“
it says, "Within the PLL's loop bandwidth, the PLL can successfully track and filter the LDO noise, reducing its contribution."


My question is :
what is "the track and filter" main in the conclusion : "Within the PLL's loop bandwidth, the PLL can successfully track and filter the LDO noise, reducing its contribution."


Thank you.
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« Last Edit: Mar 18th, 2020, 8:07pm by tulip »  

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smlogan
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Re: supply noise's influence on PLL
Reply #1 - Jun 2nd, 2020, 1:44pm
 
Dear tulip,

> what is "the track and filter" main in the conclusion : "Within the PLL's loop bandwidth, the PLL
> can successfully track and filter the LDO noise, reducing its contribution."

The phase of the output clock of a phase-locked loop will follow the phase of its input reference clock when the frequency of its phase disturbances are less than the bandwidth of the phase-locked loop. Hence, the statement from Analog Device's Analog Dialogue indicates that as long as the phases disturbances of the LDO has frequency components less than the bandwidth of the phase-locked loop, the phase-locked loop will attenuate phase disturbances due to the LDO.

Does this help tulip?

smlogan
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