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PAC and PSTB for switched capacitor integrator (Read 1211 times)
iVenky
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PAC and PSTB for switched capacitor integrator
Mar 26th, 2020, 8:42pm
 
I am designing a traditional 1st order delta sigma modulator. I tried to find the input referred noise of the integrator and switching network (circuit is shown). I set vin+ = vin- =vcm & then I set v to be a square wave at a frequency fclk/2 (to emulate the limit cycle behavior of first-order delta sigma for code 0). This is my periodic steady state point. I am also using a differential stb probe as shown to simulate pstb.

First question, is this how you simulate pss for switched cap integrator (note that this is not a switched cap amplifier but an integrator).

I apply PNOISE on this and find the output referred noise (at the output of differential integrator) & scale back to the input by using the PAC gain function by specifying the output and input nodes. I also tried using the input referred noise function in PNOISE. The results don't make sense, as the numbers are way off.

And for pstb, I see that the DC loop gain of PSTB starts off at 0 (i mean -∞ dB) and goes up at 20 dB/decade. Is this due to the integrator action? Is this how do you stability of an integrator using PSTB.

I read articles on simulating PSS/PSTB/PAC for switched cap amplifier but for integrator I am not sure if this is the right way to do.
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« Last Edit: Mar 26th, 2020, 10:46pm by iVenky »  

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Ken Kundert
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Re: PAC and PSTB for switched capacitor integrator
Reply #1 - Mar 27th, 2020, 10:48am
 
One thing that might explain your results is if your amplifier was in clipping. Did you check the time-domain waveforms to confirm that the amplifier is always in its normal operating range.

The challenge with this circuit is to get the circuit settle to a periodic operating point that is inside the normal operating range of the amplifier. I think if you can do that the normal approaches to computing noise and stability would work. But without some kind of feedback I cannot see how that will happen.

Normally I council against using a very low pass filter to provide feedback at DC, but that is what you might have to do here.

-Ken
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iVenky
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Re: PAC and PSTB for switched capacitor integrator
Reply #2 - Mar 27th, 2020, 11:28am
 
Hi Ken,

Thanks for the reply. I have verified the output of op-amp is in nominal operation range. In fact, what I am doing here is emulating the condition when the integrator is used inside an sdm with vin=0, which results in 10101010 limit cycle output. The way I do this is by switching V+ and V- back and forth by modulating the corresponding switches so that there is equal charge and discharge forcing the op-amp into this periodic state.  

I have a question about stability. I see the PSTB output is shaped by the integrator transfer function (shows something like the one I have attached (blue curve is what i see for pstb loop gain)). Is this expected when run pstb for an integrator, as it's integrating. I don't see this on the other hand if I, say, reset the capacitor C2 each cycle, thereby making it work like a switched capacitor amplifier & the effective transfer function looks like op-amp transfer function.

As far as pnoise is concerned, I am now trying to replicate what you mentioned in your document (using track and hold feedback) and see if I can measure it closed loop.

https://designers-guide.org/analysis/delta-sigma.pdf

UPDATE: the pnoise method using track & hold feedback does seem to work and match with tran noise simulation if I integrate till fclk/2. Why does sampled pnoise show values beyond fclk/2. It doesn't make sense. Also, this method is valid only upto frequencies until which PAC gain >1, right? Beyond that it may be over-estimating the noise

Also, why does the closed loop gain in Fig 15 of this reference (https://designers-guide.org/analysis/delta-sigma.pdf) show a value > 1? Since it's in unity gain feedback, I expect that number to be equal to 1.
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« Last Edit: Mar 27th, 2020, 7:15pm by iVenky »  

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Ken Kundert
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Re: PAC and PSTB for switched capacitor integrator
Reply #3 - Mar 29th, 2020, 12:42pm
 
It is strange that your circuit is running in its normal operating region. Just applying a square wave input with 0 DC level should not work unless your integrator has low gain. Even with an input with 0 DC level, any offsets or leakages in the circuit should cause the output of the integrator to saturate.

I suspect that whatever is keeping your circuit in its normal operating mode is also responsible for dropping your gain at low frequencies.

-Ken
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