The (incorrect) indentation of the original model looks like the transition() function is in a conditional (along with the contribution), but it is not. The code should be indented differently for better readability: Code:
if(!up && down)
out = -cur;
else if(!down && up)
out = cur;
out = 0;
I(pout, nout) <+ transition(out, 0.0, 20p, 20p);
But, as Ken notes, this doesn't look like true Verilog-A. You have "up" and "down" appearing in the if conditions, without the access function, and actually you haven't set a discipline for them (you set pout and nout to be electrical). I would expect a true Verilog-A model to have "electrical up, down;" and then access them with V(up) and V(down), perhaps comparing them with a threshold.
Based on the highlighting in the screen-shot, it seems the problem is with up and down, not with the unary minus sign.