Hi~~~~
If i have a single ended opamp, i want to simulation it offset voltage.
I often see the simulation step is that Vin+ & Vin- tied to ground and measure output voltage, the output voltage/Gain is the Vos.
But when input of opamp is NMOS transistor and single voltage supply, it can’t tied to ground , the opamp will off.
So how to simulation input offset voltage?
Is using unit gain feedback configuration, then Vin+ tied to Vcm ,and Vos =Vcm-Vout ? but I think this Vos depend on Vcm & opamp’s Gain,  the different Vcm the different Vos……is it correct ?

Another question is PSRR & CMRR simulation.
(no matter singled ended or fully differential opamp)
Why simulation PSRR & CMRR often use unit gain feedback configuration (CMRR=1/Acm)? Is for convenience or other?
And why i use open loop simulation CMRR=Adm/Acm, the result that is not the same as using unit gain configuration ?

Thanks a lot !!  

Buddypoor,
    For the benefit of this community, would you please either post the same response here, or add a pointer to your response on the other forum.

Thanks,
-Ken