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Design >> Analog Design >> How to analyze the linearity of S/H?
https://designers-guide.org/forum/YaBB.pl?num=1078801425

Message started by ywguo on Mar 8^th, 2004, 7:03pm

Title: How to analyze the linearity of S/H?
Post by ywguo on Mar 8^th, 2004, 7:03pm

Hello,

I am designing a S/H circuitry with bootstrapped MOS switch. As well known, linearity is very important for S/H.

When I simulating the S/H circuitry using HSPICE, one sine waveform is applied to the input of S/H. Then the S/H gives an output waveform of first-order sample and hold, i.e., track and hold. FFT analysis is done for the output of S/H.

Because usually S/H is used as the frist stage of a pipelined ADC or other A2D converters. The A2D converter only samples the output of S/H when the S/H is in hold phase. What the output of S/H looks like is not important in the sample phase of S/H. I suspect whether I should put another S/H suceeding the first S/H to get a waveform much like zero-order sample and hold.

Would you please give me any advices?

Thanks in advance.

Yawei Guo

Title: Re: How to analyze the linearity of S/H?
Post by August West on Mar 9^th, 2004, 12:38am

Do you have access to Spectre and SpectreRF? That would be the best thing to do. The RF analyses are perfect for analyzing both the noise and distortion of a S/H. See http://www.designers-guide.com/Analysis/sc-filters.pdf for instructions on how to simulate a S/H with SpectreRF.

-August