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Design >> Analog Design >> SC-CMFB
https://designers-guide.org/forum/YaBB.pl?num=1079101945

Message started by georgejor on Mar 12^th, 2004, 6:32am

Title: SC-CMFB
Post by georgejor on Mar 12^th, 2004, 6:32am

Dear all,
I want to ask a question about simulation of SC-CMFB. I had read the previous post about the same topic, but i still have a problem. Hope anyone can help me, thanks.

I have designed a folded cascode OTA. I have simulated its Gain and Bandwidth without CMFB. The gain is 80dB.

When i simulate it with a SC-CMFB by pss and pac, the gain become 60dB and similar Bandwidth.

I observe the pss trans. waveform is OK. Then, i wonder the loss of gain is due to the CMFB or wrong simulation setting or other reasons.

Please give me some suggestion!

Best Regards,
George :-[ :-[

Title: Re: SC-CMFB
Post by August West on Mar 12^th, 2004, 12:53pm

Is it possible that the common-mode feedback circuit loading the folded-cascode differential amplifier?

-August

Title: Re: SC-CMFB
Post by Paul on Mar 12^th, 2004, 1:20pm

Hi George,

apart the possibility mentioned by August, which is very probable (check the equivalent resistor value of your CMFB circuit), could it be that around the operation point some of the transistors in your amplifier are in linear (triode) region? It could be that the operating point you simulated for the amplifier is not the same than when running PSS.

Paul

Title: Re: SC-CMFB
Post by ywguo on Mar 13^th, 2004, 12:53am

Sorry that I am not familiar with SpectreRF. I simulate a telescopic cascode amplier with SC-CMFB using HSPICE.

Just as what Paul said, the operation point when you do ac simulation is probably different from that when you do tran simulation. Then some transistors maybe work in triode region. The following are the method I use to do AC simulation when using hspice.

When I run AC analysis, I use equivalent resistors to replace the caps and switches except the two caps that tied to the outputs and common mode control point. Since the half circuit of SC-CMFB actually can be considered as a switched capacitor integrator, so you can replace it with a continuous-time integrator. Thus you can replace SC-CMFB with continuous-time CMFB when doing AC simulation. Of course, you should consider the loading effect of SC-CMFB is a little different from a equivalent circuit.

Title: Re: SC-CMFB
Post by georgejor on Mar 15^th, 2004, 9:33pm

Dear,

Thanks for your advice first.

I have checked each mosfet to ensure they are inside saturation region by tran and pss too.

But the gain is still lost in PAC simulation. I think it is not normal,right?

Best Regards,
George

Title: Re: SC-CMFB
Post by Edward on Mar 21^st, 2004, 7:23am

Hi,

is there any formula that show the loading of the cmfb to the op amp?

thanks

Title: Re: SC-CMFB
Post by feiyue on Mar 22^nd, 2004, 5:32am

hi,

In my opinion,CMFB circuit just set the output common mode voltage at a proper point to make opamp work properly ,So it wouldn't affect opamp's DC gain but maybe GBW(if capacitor is large).Since your bandwidth is the same as former,fu=Gm/CL for folded cascode OTA,
I think input transistor is in normal condition but output transistors maybe lie near the linear region,so you could check the output transistor's bias voltage and vdsat.
good luck!

Title: Re: SC-CMFB
Post by feiyue on Mar 22^nd, 2004, 5:41am

hello ywguo,

how do you replace the half circuit of SC-CMFB with continuous-time integrator? I have never tried it and have great interest in it ,could you tell us in more detail?
thanks !

Title: Re: SC-CMFB
Post by ywguo on May 7^th, 2004, 11:11pm

Hi, feiyue,

Sorry to reply so late.

The following is the spice subckt for the equivalent CMFB circuit.

R1 CMC CMO1 200E3
R0 CMO2 CMC 200E3
V1 CMO 0 1.65
E1 CMO1 0 VOL='V(cbias)-(V(cmo)-V(VOP))' max=3.3 min=0
E2 CMO2 0 VOL='V(cbias)-(V(cmo)-V(VON))' max=3.3 min=0
C2 VON CMC 125E-15
C0 VOP CMC 125E-15

Where VOP and VON are the differential output of the opamp. The CMO is the commom mode output voltage. The cbias is the reference bias voltage. The CMC is the voltage that is applied to the tail current transistor or current mirror load. The resistance of R1 and R0 is calculated according to the caps and the sampling frequency.

Best regards,

Yawei Guo