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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> Modeling PLL phase noise with Verilog-A https://designers-guide.org/forum/YaBB.pl?num=1110204559 Message started by Samir on Mar 7th, 2005, 6:09am |
Title: Modeling PLL phase noise with Verilog-A Post by Samir on Mar 7th, 2005, 6:09am Dear Sir, I read the "Predicting the phase noise of PLL-based frequency synthesizers " paper, but in modeling the noise of each block some functions, like "flicker_noise", which is available in Verilog-AMS. But I am using Verilog-A, so if there is any other method to describe the noise of each block ?? Thanks for your concern |
Title: Re: Modeling PLL phase noise with Verilog-A Post by Andrew Beckett on Mar 8th, 2005, 1:27am I believe everything in the paper can be done using Verilog-A. flicker_noise certainly does exist in Verilog-A. In other words you should be able to do this with spectre, rather than requiring AMS Designer. Andrew. |
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