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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Test Hole Methodology https://designers-guide.org/forum/YaBB.pl?num=1111735839 Message started by Kirti Joshi on Mar 24th, 2005, 11:30pm |
Title: Test Hole Methodology Post by Kirti Joshi on Mar 24th, 2005, 11:30pm Hello, Could anyone tell me what Hole testing methodology is? Probably this forum contains queries related to Simulators, but I could not find an appropriate place to ask a VLSI Test related question. Basically, I wanted to know more about Test hole methodology and test hole fixing. Thanks in advance, Kirti |
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