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Simulators >> Circuit Simulators >> Simulation result different StarHspice Vs Spectre
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Message started by vikas on Mar 25^th, 2005, 6:04pm

Title: Simulation result different StarHspice Vs Spectre
Post by vikas on Mar 25^th, 2005, 6:04pm

Hello All,

We designed a 32 bit adder(Just wrote a spice netlist) and simulated with Star Hspice and it works fine. Then we created schematic and simulated with spectre. Unfortunately with spectre our circuit doesn't work.

To make it more simple I simulated a single inverter in spectre and then took cdl.out(netlist) from the schematic. Later I simulated it with Star-Hspice, and figured out a delay difference of 10 ps (with 10f F at the output node) . I am using tsmc018 (tt) model file. So i use mm018.scs "tt" in spectre and mm018.l "tt" in Hspice. I am pretty sure that I havn't made any mistakes in specifying the model file and nominal parameters.

So, can anybody tell me how these two simulator can give different results?

Thanks

Title: Re: Simulation result different StarHspice Vs Spec
Post by Andrew Beckett on Mar 29^th, 2005, 8:46pm

When you say "our circuit doesn't work" it's not clear what doesn't work...

As for the second example, my guess is that the CDL netlist you produced does not contain any AD, AS, PD, PS terms for the mosfets, whereas the spectre netlist probably does. So you probably have differences in the source/drain area and perimeter terms for the devices, which will alter the capacitances, and hence could alter the delay.

If you use a proper HSPICE interface (like hspiceD or the older hspiceS), rather than a netlist format that is intended for physical verification (where you would not be verifying source/drain areas), I suspect this problem would go away.

If this doesn't explain it, perhaps you could post the two netlists for the single inverter here? I guess they're not proprietary!

Regards,

Andrew.