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Design >> RF Design >> PSS on VCO and divider
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Message started by bison on Apr 6th, 2005, 1:44pm

Title: PSS on VCO and divider
Post by bison on Apr 6th, 2005, 1:44pm

I'm doing a PSS+PNoise simulation on a VCO and divide-by-4. The VCO is at 4GHz, and I'm expecting 1GHz at the output of the divider. But PSS gives me a frequency of about 500MHz, which leads to a failure in converge. even tstab is set long enough.  If I run the simulation individually for the two blocks, there's no problem. The error message is like:

Error found by spectre at time = 50.943 ns during periodic steady state analysis 'pss'.
After the dynamic adjustment of pstab, PSS still failed.

During all simulation, I set:
   Number of harmonics = 10
   method = gear2only
   steadyratio = 1

Thank you very much for help!

Title: Re: PSS on VCO and divider
Post by Andrew Beckett on Apr 7th, 2005, 1:03pm

What version are you using? There have been a few fixes recently to improve the convergence and handling of autonomous PSS. So if you're using IC5033 or IC5141, and are not using a recent ISR, then I'd recommend that.

Regards,

Andrew.

Title: Re: PSS on VCO and divider
Post by bison on Apr 11th, 2005, 7:39am

I'm using 5033... ???

Title: Re: PSS on VCO and divider
Post by Andrew Beckett on Apr 11th, 2005, 11:07pm

Is a recent subversion though? Help->About in the CIW should tell you the subversion and build date (I think), or you can do "icms -W" and "icms -V" from the UNIX prompt to tell you.

I assume you've ticked the oscillator option on the PSS form, and have set the nodes for the oscillator mode to be the output of the divider?

Have you tried setting liberal, moderate, or conservative
errpreset, and leaving everything else at default (hit the defaults button on the PSS options and the Simulator->Options->Analog form).

Regards,

Andrew.

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