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https://designers-guide.org/forum/YaBB.pl Simulators >> RF Simulators >> Pnoise question https://designers-guide.org/forum/YaBB.pl?num=1117702862 Message started by tromeros on Jun 2nd, 2005, 2:01am |
Title: Pnoise question Post by tromeros on Jun 2nd, 2005, 2:01am Hello, I want to simulate the phase noise of a PLL in the output of the VCO. The VCO is a ring oscillator that comprises of transistor while the other elements such as the divider and the PFD are modeled in Verilog-a language, according to the papers found in this forum. When I simulate the phase noise of the VCO alone I get a line falling by 20dB/dec as expected by the theory. However when I close the loop, I perform a pss and pnoise analysis but the phase noise of the VCO is approximately the same and does not seem to be filtered by the loop filter. I wonder what mistakes I am doing. Thanks in advance. I have a relative question also. For simulating the VCO in a closed loop do I need to model it using for example verilog-a, or using the schematic is sufficient? I ask this question because I 've seen the approach of modeling in some papers. Thanks again. -tromeros- |
Title: Re: Pnoise question Post by Ken Kundert on Jun 2nd, 2005, 6:54am Is your PLL locked? It must be locked to get the noise reduction at low frequencies. You can have the VCO modeled with transistors and use the simulator to predict noise if 1. you are using a voltage domain model 2. you are using a pnoise analysis. -Ken |
Title: Re: Pnoise question Post by tromeros on Jun 3rd, 2005, 6:39am I suppose that the pll is locked since the control voltage of the VCO is a periodic signal and the pss analysis converges. However in the pnoise analysis that follows I get the warning message: Warning from spectre during PNoise analysis `pnoise'. The Floquet eigenspace computed by spectre PSS analysis appears to be ill-defined. PNOISE computations may be inaccurate. Consider re-running the simulation with smaller reltol, different tstab(s) and method=gear2only'. Check the circuit for unusual components. And the phase noise results are the same with the open - loop VCO. I then apply some stringest requirements from the options menu of the simulation as proposed by the message but then the pss analysis does not converge even though I increase the stabilization time. My question after all is: Can i use the Direct simulation method to predict the phase noise and if yes is it possible to estimate in advance the time required for the convergence? Thanks a lot for the help. |
Title: Re: Pnoise question Post by Ken Kundert on Jun 3rd, 2005, 8:46am Tromeros, The "Floquet" warning is generally due to large low frequency time constants confusing the PNoise algorithm. Tightening tolerances can help avoid the warning, but you have to be careful not to go too far and so make it impossible for the simulator to converge. Be especially careful about tightening reltol and setting errpreset to conservative at the same time. It is okay to do both, but they both have a strong influence on the tolerances and if you do both at once you can easily go too far. It is possible to use direct simulation on a PLL to predict phase noise. The convergence problems you are experiencing may be due to a small dead-zone flutter. One way to check to see if this is really true is to using strobing in transient and strobe once per period of the reference clock. Then plot the control voltage. It should be perfectly flat. If there is any variation in it, your PLL is not operating in periodic steady state. This may be due to some interferrer or due to dead-zone jitter, etc. -Ken |
Title: Re: Pnoise question Post by tromeros on Jun 8th, 2005, 3:50am Hi Ken, I simulated the PLL using transient analysis with the strobe option and after some nanoseconds the control voltage becomes a DC signal, which means that the PLL converges. In the PSS analysis that follows there is in Fundamental Tone field the reference frequency signal. I also use the autocalculate option for the beat frequency. Finally I set logical values in tstab field according to the previous transient simulation. The VCO I use is a ring oscillator block which contains transistors. It is a schematic and not an equivalent model. I simulate the circuit without having the Oscillator option enabled and the PSS does not converge. When I enable the oscillator option having as an Oscillator node the output of the ring circuit the pss analysis does not start, throwing the message that I have a periodic input signal(reference) which is inconsistent with autonomous circuits. What can I do to overcome this problem? I suppose that the Oscillator option should be disabled but then, there probably appear problems in the build-up of the signal. Thank you for your interest :) |
Title: Re: Pnoise question Post by Ken Kundert on Jun 8th, 2005, 7:19am Tromeros, If you set tstab so that the PLL is cleanly locked before SpectreRF goes into its steady-state analysis phase, if there is no fluctuation on the any signal in the strobed transient analysis after lock, and if the strobe period is the same period specified to the PSS analysis, then you should get convergence in PSS. Since you are not getting convergence, there must be something else that is precluding convergence. It may be that the tolerances are too tight, or there may be a bug in the simulator. Can you describe the behavior of the convergence norm. The simulator will continue iterating until the convergence norm drops below one. If the convergence norm drops steadily until it reaches a floor that it cannot go below, that is an indication that the tolerances are too tight. You should definitely not be using oscillator mode. The circuit contains an oscillator, but in lock it is acting like a driven circuit. -Ken |
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