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https://designers-guide.org/forum/YaBB.pl Measurements >> Phase Noise and Jitter Measurements >> Definition of Loop delay https://designers-guide.org/forum/YaBB.pl?num=1119408551 Message started by Tommy on Jun 21st, 2005, 7:49pm |
Title: Definition of Loop delay Post by Tommy on Jun 21st, 2005, 7:49pm Hi, I read that the "loop delay" of a PLL degrades its phase margin. Can any one tell me the exact definition of "loop delay" of a PLL? ( I have a rough idea, but Iam not able to find a golden definition :( ) Thanks in advance Tommy |
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