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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Slew rate enhancement in opamps https://designers-guide.org/forum/YaBB.pl?num=1120058561 Message started by vivkr on Jun 29th, 2005, 8:22am |
Title: Slew rate enhancement in opamps Post by vivkr on Jun 29th, 2005, 8:22am Hi, Can anyone suggest a good scheme for enhancing slew rate of an opamp, say a folded cascode, without recourse to class-AB output stages? Thanks Vivek |
Title: Re: Slew rate enhancement in opamps Post by Paul on Jul 4th, 2005, 8:03am Vivek, below a couple of references that may answer your question. A low power OTA with adaptive biasing and common-mode compensation Zhiliang Hong; Yan Wang; Solid-State and Integrated Circuit Technology, 1995 4th International Conference on 24-28 Oct. 1995 Page(s):188 - 192 Power-efficient super class AB OTAs Lopez-Martin, A.; Baswa, S.; Ramirez-Angulo, J.; Carvajal, R.G.; Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European 21-23 Sept. 2004 Page(s):231 - 234 Low-voltage low-power adaptive biased high-efficiency integrated amplifiers Ferri, G.; Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on Volume 3, 2-5 Sept. 2001 Page(s):1529 - 1532 vol.3 A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range Peluso, V.; Vancorenland, P.; Marques, A.M.; Steyaert, M.S.J.; Sansen, W.; Solid-State Circuits, IEEE Journal of Volume 33, Issue 12, Dec. 1998 Page(s):1887 - 1897 900 mV differential class AB OTA for switched opamp applications Peluso, V.; Vancorenland, P.; Steyaert, M.; Sansen, W.; Electronics Letters Volume 33, Issue 17, 14 Aug. 1997 Page(s):1455 - 1456 Be careful with the adaptivity ratio and related bias stability issues. Good luck, Paul |
Title: Re: Slew rate enhancement in opamps Post by ethan on Jul 5th, 2005, 1:46am vivkr wrote on Jun 29th, 2005, 8:22am:
I have read one paper, saying "in SC integrator, settling behavior is determined by the time constant of the non-dominant pole", ..."fast settling respose" need very high frequency non-dominant pole". In the disseration of Ronald Takeshi Kaneshiro, "Circuit and Technology Considerations for High frequency" UC berkeley, 1981 or 1982, he mentioned in the "optimization of the Transient response" that "it is recommended to inserta a left-half plane zero in the transfer function of the amplifier. This zero is incorporated in th efolded-cascode amplifier by adding a feedfoward capacitor Cff across the cascode element. The addition of Cff loads both the output and the cascode nodes, but it does not create any addtional poles. " hope it helps. |
Title: Re: Slew rate enhancement in opamps Post by raul on Mar 19th, 2006, 8:53pm In the case of a two stage amplifier where the first stage is a folded cascode, you can try tying the miller compensation capacitor to the source of the common-gate devices in the folded cascode instead of tying the cap to the high impedance node of the folded-cascode. This will split the poles better and allow you to reduce the capacitive load at the high impedance node of the folded cascode which sets the slew-rate. This architecture has some gotchas; run large signal sims to be certain you have no large signal oscillations. good luck. |
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