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Design >> RF Design >> about TIA simulation
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Message started by beabroad1 on Jul 10^th, 2005, 4:02pm

Title: about TIA simulation
Post by beabroad1 on Jul 10^th, 2005, 4:02pm

i am now designing a TIA in Cadence IC environment.

i know for LNA, i can use ports of 50ohm inner resistance for input and output ports, and use sp to simulate it.

however, for TIA, the input is current, and the port component output voltage only. so i want to know whether it is possible to simulate TIA using sp. thanks.

Title: Re: about TIA simulation
Post by vikas on Jul 27^th, 2005, 11:40pm

I believe that u r talking about transimpedance amplifier. In any case if u go by the s-parameter definition, which is related to power waves or to say travelling current and voltage waves. then this analysis should also be valid.

Title: Re: about TIA simulation
Post by Paul on Jul 28^th, 2005, 12:21am

You can write the I-V transfer function as a function of S parameters. So you should be able to simulate it using SP. As your input/output ports are probably not 50 Ohm matched, you must consider this in your calculation.

What is the idea to use SP for simulation instead of "classical" AC simulation? I must admit I never tried SP on my amplifier designs.

Paul