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Design >> Analog Design >> VCXO- Balanced Vs Unbalanced structure
https://designers-guide.org/forum/YaBB.pl?num=1122590596

Message started by hchanda on Jul 28^th, 2005, 3:43pm

Title: VCXO- Balanced Vs Unbalanced structure
Post by hchanda on Jul 28^th, 2005, 3:43pm

Hello all,

I have few questions related to VCXO which I am new to this area.

I am currently using a Balanced VCXO (balanced in the sense that the CAP. on Xtalin and Xtalout are equal) using the pierceamplifier [input to amplifier is Xtalin and output is Xtalout, input(gate) and output(drain) is connected by a resistor.]. I have few questions regarding it.

Questions:
--------------

1.If the transistor in the pierce amplifier enters linear region how would it affect the phase noise of VCXO?( Is it because the thermal noise of the transistor increases or is there any other reason?)

2.By using unbalanced VCXO(more cap on Xtalout, and CAP on Xtalin and Xtalout are not equal) how can it can be assured that the transistor in pierce amplifier will not enter in linear region?

3.What are adavantages and disadvantages of unbalanced VCXO over banalnced VCXO?

If anyone has any documents related to this will you please let me know, I tried searching and I was not able to succeed.

Thank you very much.

~H

Title: Re: VCXO- Balanced Vs Unbalanced structure
Post by oscilentinc on May 13^th, 2011, 8:59am

hChanda - there are only disadvantages to an unbalanced VCXO. think about it if the timing frequency http://www.oscilent.com/catalog/Category/vcxo.htm that you are trying to balance gets off the whole system could shut down. you need to make sure that you are using the right vcxo filter to check out the list i provided for you to see if some of them work.

Title: Re: VCXO- Balanced Vs Unbalanced structure
Post by loose-electron on May 13^th, 2011, 11:03am

schematics would be useful of whats going on