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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> soi cmos https://designers-guide.org/forum/YaBB.pl?num=1124023538 Message started by jason_class on Aug 14th, 2005, 5:45am |
Title: soi cmos Post by jason_class on Aug 14th, 2005, 5:45am Hello All Anyone has any idea why SOI technology is preffered for RFIC design? Kindly share with me any good links on this topic especially in the area of RFIC Thank you so much best regards Jason |
Title: Re: soi cmos Post by jefkat on Aug 15th, 2005, 3:49am The main reason is that you can have high Q inductors in this technology. The best resource is IEEE. shaf. |
Title: Re: soi cmos Post by jason_class on Aug 15th, 2005, 5:38am Hi Jefkat Thanks a lot. I will search on this Q benefit. If there is any good paper on this which you know of, kindly recommend me. Are you working in soi domain? Thank you Jason |
Title: Re: soi cmos Post by Paul on Aug 15th, 2005, 1:33pm Jason, you also have potentially lower parasitic device capacitance. Paul |
Title: Re: soi cmos Post by jason_class on Aug 17th, 2005, 9:09am Thank you all for the posting Jason |
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