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Measurements >> Phase Noise and Jitter Measurements >> Parametric amplication in bandswitch VCO
https://designers-guide.org/forum/YaBB.pl?num=1124832270

Message started by jm1974 on Aug 23^rd, 2005, 2:24pm

Title: Parametric amplication in bandswitch VCO
Post by jm1974 on Aug 23^rd, 2005, 2:24pm

Hi,

I ran into a problem of paramteric amplication of MOS switch noise when the switch is off. I read Ken paper on it and used all of his suggestions to avoid seeing this effect (placing a shunt resistance acroos the switch as well as series resistance with gate of the switch). I'm also using MOS model with flkmod=1. I see around 30 dB noise degration at 100kHz offset
I'm using regular MOS model and not RF MOS model that has explicit drain to sub diodes
Is this for real or a simulation artifact? Is there a simple way to avoid this problem ?
anyone had this problem before? any answers is highly appreciated.

thanks.
jm