The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Measurements >> Phase Noise and Jitter Measurements >> Ken, consult about your paper.
https://designers-guide.org/forum/YaBB.pl?num=1125630562

Message started by trashbox on Sep 1^st, 2005, 8:09pm

Title: Ken, consult about your paper.
Post by trashbox on Sep 1^st, 2005, 8:09pm

Hi Ken and other friends,
I read Ken's paper-Predicting the phase noise and jitter of PLL-based frequency synthesizers, and I am puzzled about the following issues, would you please give any hints?

#1. When making the Verilog-A model with accumulating jitter, dT always equals jitter*Gaussian_distribution. However, the jitter expressions are different in LISTING11~14:
$LISTING11: jitter equals period jitter.
$LISTING12: jitter equals sqrt(K)*period_jitter, what is the mean of K here? If K means k cycles, why select k-cycle jitter?
$LISTING13: jitter equals sqrt(K)*period_jitter,too. But K=4 in this case.
$LISTING14: jitter equals sqrt(ratio/2)*period_jitter, what is the mean of ratio here?

#2. When making the Verilog-A model with synchronous jitter, dt always equals edge-to-edge jitter*Gaussian_distribution in LISTING9~10, we select edge-to-edge jitter not period jitter, cycle-to-cycle jitter or k-cycle jitter. Why?

#3. The edge-to-edge jitter expression, formula (55) on page28, equals the period jitter expression in table2 on page26. Does this mean that the edge-to-edge jitter is the same with period jitter in synchronous jitter type blocks such as PFD/CP and FDs?

#4. What is the edge-to-edge jitter expression in accumulating jitter type blocks?

Title: Re: Ken, consult about your paper.
Post by Ken Kundert on Sep 2^nd, 2005, 2:35pm

#1: In listing 11 the model updates the jitter twice per cycle. The variance in the length of each half cycle is half the variance in the length of the full cycle. The period jitter for the full cycle is var(dT)^1/2, thus the period for each half cycle is (var(dT)/2)^1/2, or 1/2^1/2dT.

In listing 12 the same thing is going on, with the 2 half periods being denoted by the variable K. Here K is the number of subcycles per period, and is unrelated to the k in k-cycle jitter.

In listing 13, K is now 4 because there are 4 subcycles per period (this being a quadrature oscillator).

In listing 14 ratio is the divide ratio. This is a model of an oscillator combined with a frequency divider.

#2: Edge-to-edge jitter is more convienient. It is not used in the oscillators because edge-to-edge jitter does not exist for oscillators.

#3: There is an error in Table 2. For the synchronous jitter entry, it should indicate that the jitter is edge-to-edge jitter rather than period jitter. I'll update that.

#4: Edge-to-edge jitter is not defined in accumulating jitter because the first edge does not exist.

-Ken

Title: Re: Ken, consult about your paper.
Post by trashbox on Sep 5^th, 2005, 3:39am

Hi Ken,
Thank you very much for your reply. I have two questions again:

#1. Is the period jitter’s expression the same for accumulating jitter and synchronous jitter? Always be (ct)^1/2?

#2. My simulation using EldoRF simulator (I have no SpectreRF’s license) shows that adding some small capacitors (~10fF) on the circuit nodes will help the nonlinear circuit such as PFD be convergent when doing steady-state simulation. If I remove these capacitors, it will not be convergent. What are your opinions on the role of such small capacitors? Is there similar phenomenon in SpectreRF when doing PSS simulation?

Thank you sincerely.

Title: Re: Ken, consult about your paper.
Post by Ken Kundert on Sep 5^th, 2005, 5:04pm

#1. No. c is not even defined for driven circuits.

#2. I don't know why the capacitors would improve convergence. It might be due to discontinuities in the models. I cannot say that SpectreRF would not require the capacitors, but I have never seen a situation where they were.

-Ken

Title: Re: Ken, consult about your paper.
Post by trashbox on Sep 5^th, 2005, 6:36pm

Hi Ken,
Thank you for your patient respondence again.

Still about the case: #1 (i.e., several jitter forms in driven circuits)
#1.1 We can get the edge-to-edge jitter J_ee with strobe noise capability of SpectreRF that is illustrated on page28 in your paper. According to formula (50) on page27, then we can get k-cycle jitter J_k, furthermore, formula (51) and (52) shows that cycle-to-cycle jitter J_cc equals J_k so that we can get J_cc. Is it right?

#1.2 In the formula (51) and (52), does the J means period jitter? (In section 10, J means period jitter) If yes, does it mean period jitter in driven circuits equals sqrt(2)*J_ee? If no, what is the period jitter expression in driven circuits? Or the period in driven circuits is meaningless?

#1.3 In my opinion, the definition of period jitter is valid for both accumulating jitter and synchronous jitter, but can not distinguish these two jitters. So why not define the constant c in driven circuits?

Thank you!

Title: Re: Ken, consult about your paper.
Post by Ken Kundert on Sep 6^th, 2005, 10:34pm

#1.1: Yes.

#1.2: Yes.

#1.3: Period jitter can be used with both synchronous and accumulating jitter, however c is a particular point on the noise curve produced by oscillators; a point that does not exist on the noise curve of driven circuits because the curves have a different shape. c is not a characteristic of period jitter, it is a characteristic of oscillators.

-Ken