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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> Binary representation in verilogA https://designers-guide.org/forum/YaBB.pl?num=1129073361 Message started by parthsv on Oct 11th, 2005, 4:29pm |
Title: Binary representation in verilogA Post by parthsv on Oct 11th, 2005, 4:29pm Hi All, I am currently working on digital calibration of ADC. I am presently modelling the algorithm(VerilogA) for which I need a 7b counter. Is it possible to have a binary counter like in Verilog (As I do not want to spend time on modelling the counter) say for eg: Counter <= Counter + 1'b0; (syntax may not be exact) Thanks in Advance, Partha |
Title: Re: Binary representation in verilogA Post by jbdavid on Oct 12th, 2005, 12:53am you can't have binary numbers.. but you can have integer variables and there are bitwise operators for them.. do you thing this would work for you? integer counter analog begin @(cross(V(clk,clkb),+1,ttol,vtol) begin counter = (counter +1)%(1<<7); end end --- of course if you'd use Verilog-AMS you could use your normal Verilog construct for the counter.. |
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