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Measurements >> RF Measurements >> questions about test of PLL and VCO
https://designers-guide.org/forum/YaBB.pl?num=1129994730

Message started by chip on Oct 22^nd, 2005, 8:25am

Title: questions about test of PLL and VCO
Post by chip on Oct 22^nd, 2005, 8:25am

1.about I/O circuit,How to choose the PAD for test?Beacause of the high speed output,do I have to choose LVDS PAD?
and is the speed of the I/O important?If i decide to design PAD myself,what should I pay special attention for?
2.about package,because of the high speed output,do I have to use flip chip package?
Could I use normal package and LVDS PADs,then construct circuit at board level to recovery the signal?
3.how will the problems above and the measurement instrument influence the measurement of the jitter of our PLLand VCO

thanks a lot:)