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Modeling >> Semiconductor Devices >> 1/f noise versus process
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Message started by cktman on Dec 13^th, 2005, 11:02am

Title: 1/f noise versus process
Post by cktman on Dec 13^th, 2005, 11:02am

How does 1/f noise scale in smaller-geometry processes? Assume that I have a current-mirror that has constant area for 0.35um, 0.18um processes, etc. How would you expect the 1/f componet of the output current to scale?

Title: Re: 1/f noise versus process
Post by Terence on Dec 14^th, 2005, 2:42am

My opinion is the following.
The number of traps in GOX will be reduced with the thinner GOX. Therefore, the 1/f noise should be reduced with process scaling down.

You may read this paper, " Future perspective and scaling down roadmap of RF CMOS, " Symposium of VLSI Circuits, 1999.

Title: Re: 1/f noise versus process
Post by Geoffrey_Coram on Dec 15^th, 2005, 8:46am

I would think that the effect of the (smaller number of) traps would be larger in a smaller-geometry process. Also, 1/f noise can average out for large devices: one trap is occupied, but another isn't, and the effects cancel.

Probably also the trap density is a function of the maturity of the process. In fact, the developers of the HiSIM mosfet model claim that 1/f noise needs no fitting parameters for a mature process!

S. Matsumoto et al, "1/f noise characteristics in 100nm-MOSFETs and its modeling for circuit simulation," IEICE Trans. Electron., vol. E88-C, pp. 247 254, 2005.