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Modeling >> Semiconductor Devices >> How to model BJT breakdown?
https://designers-guide.org/forum/YaBB.pl?num=1136079611

Message started by steven on Dec 31^st, 2005, 5:40pm

Title: How to model BJT breakdown?
Post by steven on Dec 31^st, 2005, 5:40pm

I wonder how to model BJT BV_cbo or BV_ceo, where Ib or Ic would be zero? Or maybe the breakdown can only be observed from measurement?

Title: Re: How to model BJT breakdown?
Post by Geoffrey_Coram on Jan 2^nd, 2006, 4:37am

It's possible to model breakdown in simulation. Mextram 504, which includes weak avalanche, allows one to capture the reversal of base current (and hence to find the point where Ib=0). Probably other models do, also; Hicum also includes equations for B-E Zener breakdown. Neither of these models captures snapback, nor "strong" avalanche.

Title: Re: How to model BJT breakdown?
Post by steven on Jan 2^nd, 2006, 9:48pm

I looked up Mextram model a bit for Philips. This is a c-library file and dedicated to specific simulators. So ususally how do you apply a given *.c model file when the specified simulators are not available. I vaguely recalled that general simulator like HSpice can inport a *.c model file. Is it correct?

Title: Re: How to model BJT breakdown?
Post by Geoffrey_Coram on Jan 3^rd, 2006, 5:11am

You should have a look at the Verilog-A description from TU Delft: http://hitec.ewi.tudelft.nl/mug/

HSpice has a Verilog-A option that will allow it to run Verilog-A models. (The C code from Philips can't be used in HSpice.)

Title: Re: How to model BJT breakdown?
Post by steven on Jan 3^rd, 2006, 9:57am

Thanks Geoffery, that helps. It is good to know HSpice can run Verilog-A mode. Will look it up.

Title: Re: How to model BJT breakdown?
Post by steven on Jan 4^th, 2006, 9:29am

Hello Geoffery,

Can you point a quick link or example syntax on how to use the HSpice option for Verilog-A? I couldn't find that on my HSpice manual. Thanks for your comments.

Title: Re: How to model BJT breakdown?
Post by Geoffrey_Coram on Jan 5^th, 2006, 8:42am

Code:

*
.options post=ascii
.hdl "diode2.va"

X1 1 0 diode2 rs=10
V1 1 0 1

.dc v1 -1 1 0.01

.end

The instance letter is always X. Also, you have to have the right HSpice -- I think there's a "basic" HSpice that doesn't include the Verilog-A option.

Title: Re: How to model BJT breakdown?
Post by steven on Jan 5^th, 2006, 8:19pm

I see why my HSpice doesn't have this function. It is a basic one. Anyhow, I will keep a mind note on this.

Thanks Geoffrey,
(Sorry I spelled your name wrong in my previous post. There should be a function can view what the previous posts contents were)