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https://designers-guide.org/forum/YaBB.pl Modeling >> Semiconductor Devices >> How to analyze each leakage current using HSPICE? https://designers-guide.org/forum/YaBB.pl?num=1136176881 Message started by ipierre on Jan 1st, 2006, 8:41pm |
Title: How to analyze each leakage current using HSPICE? Post by ipierre on Jan 1st, 2006, 8:41pm How to analyze each leakage current(in MOSFET) using HSPICE? For example, .print i1(nmos) <- I(drain) .print lx5(nmos) <- I(souce-bulk) But, I don't know how to simulate each leakage current as below, :-[ sub-threshold leakage, Source/Drain Junction Band-to-Band Tunneling leakage, gate-leakage, gate-induced drain leakage. please let me know... Thanks in advance. iPierre. |
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