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Design >> Mixed-Signal Design >> analog signal in ADC
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Message started by steven on Jan 4^th, 2006, 3:26pm

Title: analog signal in ADC
Post by steven on Jan 4^th, 2006, 3:26pm

Thanks for Paul's reply on my questions. Now I have another one: when designing ADCs, the buffers are used differential amplifier structures, e.g., folded cascode. This implies the input signal has differential feature. However, the input signal could be single-ended, which means the response of the amplifier won't be as good as differential signal. Under this case, I wonder what can be done to optimize the folded cascode structure. A summary or reference is well appreciated.

Thanks in advance.

Title: Re: analog signal in ADC
Post by vivkr on Jan 4^th, 2006, 11:50pm

Hi Steven,

If you are designing to include functionality for both differential and single-ended operation, you will use a fully differential
structure anyway, and either accept the penalty in SNR from using a single-ended input, or overdesign for the differential case.
For a high-performance design, you prefer this option.

If you do wish to design a single-ended structure only, then I suppose you are referring to the degradation in the AC response
caused by the mirror. Typically, this is fixed by careful design.

You could use an NMOS input and diode-connect the current sources on the NMOS side. This offers double the slew rate
compared to diode-connecting the PMOS devices on top of the folding nodes, and has better CMRR. However, the zero
is worse here. However, the extra slewing current allows you to compensate the opamp a little more easily.

I hope this is helpful for you. Perhaps others can offer their comments.

Regards
Vivek

Title: Re: analog signal in ADC
Post by steven on Jan 5^th, 2006, 8:28pm

Hello Vivkr,

Thanks for your explanation. I indeed intended to consider the case of differential structures that would take care of both differential and single-ended signals. But I am not quite sure the topology you mentioned on single-ended signal struture. Do you mean using the current mirror load rather than diode-connected load? Since we can't see schametics here, maybe you can write a very simple spice netlist deck to illustrate a little more on your idea? That will be very helpful for me to comprehend and discussion.

Thanks.

Title: Re: analog signal in ADC
Post by vivkr on Jan 6^th, 2006, 12:07am

Hi Steven,

You can find the topology I mention in the textbook by Razavi (Design of analog integrated circuits) in Chapter 9
on opamps (Section 9.8-Slew Rate). Fig. 9.58 uses this structure as an example.

This is the topology that I recommend. The diode connection required in a purely single-ended toplogy is
done with M7 and M8 here. Alternatively, you could have diode-connected M9 and M10, but this has some of
the undesirable effects that I mentioned.

However, if you are going to use a fully differential toplogy, then this is unimportant.

Regards
Vivek

Title: Re: analog signal in ADC
Post by steven on Jan 7^th, 2006, 9:23am

Hello Vivkr,

I understand what you referred to now.

Thanks.