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Design Languages >> Verilog-AMS >> 3 derivatives at 3G???
https://designers-guide.org/forum/YaBB.pl?num=1137402011

Message started by jefkat on Jan 16^th, 2006, 1:09am

Title: 3 derivatives at 3G???
Post by jefkat on Jan 16^th, 2006, 1:09am

Hi everyone..
I have a vco operating at 3G. I wanted d/dt, d2/dt,d3/dt, (first , second and third)
drivative of the output waveform. I am using Verilog A. In the trasient analysis some
nodes go to very high voltages for the obvious reasons. so simulator stops.
These high voltages are due to the fact that 1. frequency of waveform is high (2)
in the begining I use some step voltages to start the oscillator.
Is there anyway to tell the transient to not take those initial things into account,.
Any help!
Thanx for your time ...
jefkat

Title: Re: 3 derivatives at 3G???
Post by Geoffrey_Coram on Jan 17^th, 2006, 6:47am

Can you use something other than a step? Maybe a PWL?

Can you set the blow-up quantity such that the simulator doesn't stop when the "voltages" get so large?
As I understand it, they're just derivatives, not actual circuit voltages.

You could also look into doctoring your Verilog-A so that it doesn't output anything until 10ns.

analog begin
if ($abstime > 10n) output = 1;
else output = 0;

V(deriv) = ddt(V(in) * output);

end