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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> what kind of verilg-A model need for a PLL AC sim? https://designers-guide.org/forum/YaBB.pl?num=1138183172 Message started by bluestatic on Jan 25th, 2006, 2:08am |
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Title: what kind of verilg-A model need for a PLL AC sim? Post by bluestatic on Jan 25th, 2006, 2:08am hi experts, I'm new to verilog-A and AMS sim, currently try to build a verilog-A model for a PLL design to predict its performance. As a start, I'm using the "pllLib" provided along with IC50 as an reference. My question is : 1. It is true that I must have a phase domain model to analysis PLL AC response(loop gain and phase margin), and then I have to build another voltage domain model to analysis PLL's transient response? 2. How did you guys proceed the AC analysis on a PLL in general case. Will you build up a verilog-A model, or you just do it directly with actual schematic? If I do it directly, will it take very long machine time. 3. I read ken's article on PLL jitter modeling, and try to use his VCO model http://www.designers-guide.org/VerilogAMS/functional-blocks/vco/vco.va, I guess it is not problem for a transient sim, but can I use it for AC sim? many thanks |
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Title: Re: what kind of verilg-A model need for a PLL AC Post by Jess Chen on Jan 25th, 2006, 10:51am Quote:
I believe the alternative is to apply a pss/pac analysis to the closed loop voltage domain model. There is a similar discussion regarding power supplies. Look under "High-Power Design/DC/DC Buck's Phase Margin analysis using spectre ?". However, I think your biggest problem here would be in getting the pss analysis to converge for a closed phaselock loop. I've heard it can be done but I'd bet it takes some effort, perhaps more than the effort required to build a phase domain model. I have also not heard whether the loop gain from the subsequent pac analysis is correct. It's something I always wanted to try. By the way, depending on the problems you want to study, the phase domain models may meet your transient needs too. The phase domain models are nonlinear and can do a fair job of simulating transient responses in a very small fraction of the time a voltage domain model takes. Quote:
Is this the same question as #1? If you are building the model from the schematic, I assume you are using device level model, which must be a voltage domain model. AC analysis will not give you any meaningful results from a voltage domain model. Quote:
Ken can correct me if my answer is outdated but I believe Ken's paper describes a voltage domain model. However, I believe Ken used a phase domain model to generate any transfer functions that appear in the paper. I would have to re-read the paper to be 100% sure though. -Jess |
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Title: Re: what kind of verilg-A model need for a PLL AC Post by bluestatic on Jan 25th, 2006, 7:54pm HI, jess, really appriciate your answer. I'm currently reading your paper on CDS PLL library and willy try to follow the sample to build-up my own phase domain model (which is really much more difficult than building a voltage domain model). :-[ BTW, do you think I also need to model the phase delay on feedback path(clock buffers etc) after divider, which will also affect phase margin I assume. One more question, if we forget about all the models and do an direct AC analysis on a actual charge pump PLL design, any idea generally how long it will take (hours/days/weeks?) I know most of the time it is l impossible to do transient analysis >100us on such a case, but not sure about the AC analysis. many thanks |
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Title: Re: what kind of verilg-A model need for a PLL AC Post by Jess Chen on Jan 25th, 2006, 11:41pm What do you mean by direct AC? If you mean Spectre AC analysis, the results will be meaningless when applied to an actual (voltage domain) PLL because the linearization will lock the charge pump in the source, sink, or off state in which case the loop will be open. Also, the "gain" from the linearized VCO will be meaningless because Spectre is linearizing about a DC operating point and the VCO, like the charge pump, is not in equilibrium during steady state operation. You may not have to derive your own phase domain model. The purpose of the library was to save the customer from having to perform that task. The state space averaged model in the pllLib may work for you with the proper parameters. The tricky part is probably in extracting the VCO tuning curve, but even that is not too bad if you have SpectreRF. Let me know if you have questions about the pllLib models. -Jess |
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Title: Re: what kind of verilg-A model need for a PLL AC Post by bluestatic on Jan 26th, 2006, 12:57am Jess, OK, now I got it. ( really sorry that I overlooked some of your point in ur first reply). I guess that I need to spend more time on studying the your samples/documents before I asked a further question. Thanks a lot |
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Title: Re: what kind of verilg-A model need for a PLL AC Post by Jess Chen on Jan 26th, 2006, 8:05am No problem. I'd be interested in whether you found the models useful. -Jess |
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Title: Re: what kind of verilg-A model need for a PLL AC Post by calven on Apr 19th, 2007, 8:28am hi! where can i find jess's paper on CDS Pll library? thanks a lot! |
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Title: Re: what kind of verilg-A model need for a PLL AC Post by Eugene on Apr 19th, 2007, 7:15pm In the Cadence documentation, look at the G appendix of the SpectreRF Simulation Option User Guide. It is called "Introduction to the PLL library". |
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Title: Re: what kind of verilg-A model need for a PLL AC Post by calven on Apr 19th, 2007, 9:50pm oh.i am reading it now.i also find that many cells are created by jess in cadence. |
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