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Design >> Analog Design >> how to simulate the startup problem in bandgap ref
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Message started by zychang on Feb 5^th, 2006, 12:43pm

Title: how to simulate the startup problem in bandgap ref
Post by zychang on Feb 5^th, 2006, 12:43pm

Hi all,

a quick question on the startup problem in bandgap reference circuit. I just found difficulties in simulating this issue. I did ramp the supply voltage from zero in a dc sweep simulation, but it always gave me the same result either with or without startup circuit. I don't know what else I have missed in the simulation configuration. any suggestions will be appreciated.

Mike

Title: Re: how to simulate the startup problem in bandgap
Post by Paul on Feb 5^th, 2006, 11:07pm

Hi,

If you want to simulate the start-up behavior, you should try transient simulation. DC simulation only shows the sensitivity of the bandgap output to DC (or very low frequency) power supply variations, not the time-domain start-up.

You don't say what is the output when you do the DC sweep. It should look reasonable, at least when the start-up circuit is implemented.

Paul

Title: Re: how to simulate the startup problem in bandgap
Post by zychang on Feb 6^th, 2006, 6:55am

thanks for your comments Paul. Now i'm using the transient analysis to simulate the circuit. First, I disconnected the start-up circuit from the main circuit (by the way, the main circuit is a current reference generator using bipolar core) to see if the start-up problem shown up. But the result shows that the output current jump to the current I want right away, and start-up didn't occur. I don't know what else I should do to it. looking forward to your comments again.

Title: Re: how to simulate the startup problem in bandgap
Post by Paul on Feb 7^th, 2006, 4:09am

Hi,

do you ramp the supply voltage? These circuits usually start up even without a dedicated start-up circuit, if you apply the full supply voltage at t=0 in your simulation, the operating point calculated by the simulator will usually correspond to this. Try starting your simulation with Vdd=0, then ramp it to its nominal value. Apply quite a fast ramp to see the start-up time of your circuit and not the rise time of your supply voltage.

You should also try to add a couple of estimated parasitic capacitances to the critical node, only then you should see a difference with/without the start-up circuit. As most of these circuits, when properly designed, start up by themselves based on leakage components, the goal of the start-up circuit is to make sure they do so over PVT variations, mismatch and so on, and also to do it in a convenient time.

Paul