The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> How to simulate mismatch from Analog Environment
https://designers-guide.org/forum/YaBB.pl?num=1140109521

Message started by zhc on Feb 16^th, 2006, 9:05am

Title: How to simulate mismatch from Analog Environment
Post by zhc on Feb 16^th, 2006, 9:05am

I have read the article

http://www.designers-guide.org/Modeling/montecarlo.pdf

I wonder if I can do what is mentioned there from Analog Environment (Virtuoso)
Do I need to supply some custom model files that specifies sigma of transistors, resistors and capacitors?
Under which entry from the Cadence Openbook document can I find instruction on this?

Thanks

Title: Re: How to simulate mismatch from Analog Environme
Post by Andrew Beckett on Feb 18^th, 2006, 6:19am

Yes, you can do this under the Analog Design Environment. You have Tools->Monte Carlo to access Monte Carlo from ADE. You can also specify the statistics blocks (as described in the paper) via the model libraries form (assuming you're using the spectre interface - the spectreS interface works quite differently and should be avoided - it's an obsolete, rather limited, interface to spectre).

Now, the fact you said "openbook" suggests to me that you're using an old version of the tools - "cdsdoc" has been the documentation system since IC446 - and neither IC446 or IC5033 are supported versions any more. Whatever you're using, the documentation has a pretty capable search engine. Searching for monte carlo ought to find it...

Andrew.