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Design >> Analog Design >> too little noise from pnoise simulation
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Message started by vivkr on Feb 24^th, 2006, 4:23am

Title: too little noise from pnoise simulation
Post by vivkr on Feb 24^th, 2006, 4:23am

Hi,

I am using PSS+Pnoise analysis for simulating the noise in my transistor-level circuit.
It is a lossy integrator, with an opamp, 2 caps, and some switches. It does an offset-cancellation
by sampling the input with respect to the opamp virtual ground.

When I simulate the noise of this circuit with PSS+Pnoise, I see something strange:

1. There is 1/f noise, although it should have disappeared due to the correlated double-sampling.
I am able to verify that the offset is indeed cancelled, if I explicity add a large voltage (few mV)
as offset to the opamp input. It cannot be that there is 1/f noise at <1Hz. No shaping of this
noise is seen either.

2. The total thermal noise seen is too low, compared to my hand calculations, which are a little
pessimistic, but not so large.

I have used very large number of sidebands to verify that increasing sidebands does not have much effect.
I expect 5 sidebands, and my circuit shows practically no change going from 10 to 100 sidebands.

The maxacfreq is also set quite high. I see no warning messages in the pnoise log saying that this frequency
is too low. Just for reference, the maxacfreq is about 20x of the expect opamp noise bandwidth.

I have set the tstab in PSS so that the cycle ends towards the end of an integration phase. I suppose this is
the correct way to do it, since I will get the final output after the last integration cycle.

The integration operation itself is direct charge-transfer in nature. It is only the sampling part
where the opamp comes in to help cancel the offset.

Any hints will be greatly appreciated. I have read the paper on using PSS+Pnoise on this website, but I
can't see anything which I may have missed, but I am probably wrong about this.

Regards
Vivek

Title: Re: too little noise from pnoise simulation
Post by huber on Feb 24^th, 2006, 12:50pm

The output is discrete time, correct? If so, then you should be sampling it with an ideal SAH or using the timedomain noise anaylsis option. If you just look at the continuous-time output then 1/f noise won't be cancelled and there will be some scaling errors from the duty cycle.
-Dan

Title: Re: too little noise from pnoise simulation
Post by chase.ng on Feb 24^th, 2006, 10:11pm

Hi,

I did simulate a CDS integrator before using the guide with no problem, the 1/f is still there but is greatly attenuated but the thermal noise floor increases a little bit. The integrator itself is a CDS, parasitic insensitive, non-inverting, build with fully differential SC-CMFB OPAMP. There is no SAH at the output side as far as I concern. Did you verify the transfer functions of your integrator and the opamp using PAC? Anyway, there are some of the integrator such as double delay that require more than 1 cycle to complete their integration cycle, in that case you might need to make sure you PSS know it. I don't remember I have any problem simulating using the guide. Hope this help.

chase

Title: Re: too little noise from pnoise simulation
Post by vivkr on Feb 28^th, 2006, 3:19am

Hi,

Thanks for the suggestions. Now, I have a noise spectrum which looks correct in shape.
I still do not have as much noise as expected, but I think increasing the sidebands may now
help. I was running simulations with only 5 sidebands.

Regards
Vivek