The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> DC offset processing
https://designers-guide.org/forum/YaBB.pl?num=1141147092

Message started by steven on Feb 28^th, 2006, 9:18am

Title: DC offset processing
Post by steven on Feb 28^th, 2006, 9:18am

Hi,

I need references on DC offset processing methods for amplifier, for instance, offset cancellation by capacitors or offset calibration or offset removal loop. Are there references discuss this systematically?

Thanks

Title: Re: DC offset processing
Post by Paul on Feb 28^th, 2006, 12:33pm

Hi Steven,

could you let us know what kind of circuit you are designing. Do you want to implement the offset cancellation scheme in a pure switched-capacitor circuit, or is it something that should operate in an otherwise continuous-time fashion? It may also be interesting to know in case of a SC circuit what is the function of the circuit (integrator, amplifier, ...)

In a general manner, you can find quite some information to start on this topic in Gregorian-Temes (http://www.designers-guide.org/Books/#Gregorian-1986) and I believe also in Johns-Martin (http://www.designers-guide.org/Books/#Johns-1996)

Paul

Title: Re: DC offset processing
Post by steven on Feb 28^th, 2006, 5:40pm

Paul wrote on Feb 28^th, 2006, 12:33pm:

Hi Paul,

I know my question sounds too broad to answer. Basically what I want is to have a comparison between open-loop and close-loop DC offset cancellation (or calibration). The particular circuit topology (discrete or continuous) may not be important but will be mainly working on high gain amplifiers, e.g., the first stage of front-end receiver. Since the DC offset is important to speed and performance in this case, close-loop will have good performance but it is more complex and slower. Open-loop has the problem of less accurate. These are just general understanding. So what I need is a more comprehensive analysis.

Thanks,
Steven

Title: Re: DC offset processing
Post by Paul on Mar 2^nd, 2006, 8:12am

Steven,

I don't know if this corresponds to what you are looking for, but I just remembered an interesting paper in this field:
Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization
Enz, C.C.; Temes, G.C.;
Proceedings of the IEEE
Volume 84, Issue 11, Nov. 1996 Page(s):1584 - 1614

Enjoy

Paul

Title: Re: DC offset processing
Post by huber on Mar 3^rd, 2006, 1:13pm

Hi Steven-

The Temes paper Paul referenced is a great comprehensive reference for offset removal, but if you want something a little friendlier to read try:

Design techniques for high-speed, high-resolution comparators
Razavi, B.; Wooley, B.A.
Solid-State Circuits, IEEE Journal of
Volume 27, Issue 12, Dec. 1992 Page(s):1916 - 1926

It gives a good review of input vs. output offset storage techinique.
-Dan

Title: Re: DC offset processing
Post by steven on Mar 3^rd, 2006, 9:57pm

huber wrote on Mar 3^rd, 2006, 1:13pm:

Hi Paul and Dan,

Thanks a lot for your inputs on the broad topic I brought up. I will get the paper recommended by Paul. The self-descriptive title seems very interesting.

I've read the paper Dan pointed out. In fact, the IOS and OOS techniques are more attractive since the loops in those cases are not as complicated as other RC feedback loop. "Complicated" means the additive loop-gain caused from the extra RC lowpass filter, which extracts the DC component. However, the OOS and IOS technique may not be suitable to opamp case but good for comparator because the former one has stability issue if additional capacitors are added while the later has a positive feedback in general. So less complex loop or no loop would be preferred in (high gain) Opamps, maybe a better term I am asking is an open-loop autozeroing technique. At least this was I thought when I asked. However, I don't know if there are any systematical analysis out there.

Thanks again,
Steven