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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Some confusion about Monte Carlo simulation https://designers-guide.org/forum/YaBB.pl?num=1145641356 Message started by Jet_Wu on Apr 21st, 2006, 10:42am |
Title: Some confusion about Monte Carlo simulation Post by Jet_Wu on Apr 21st, 2006, 10:42am In layout, we alwayse match the transistors. The matched transistors should have some correlation in the parameter variation. But in monte carlo analysis, these correlation seem not to be taken into account. Have someone done things like this? Does Monte-carlo over-estimate? Thanks. |
Title: Re: Some confusion about Monte Carlo simulation Post by chase.ng on Apr 21st, 2006, 4:43pm Hi, As far as I know the mismatch parameter for Monte Carlo is assuming that the device is place side by side. If the transistors in the layout is being matched carefully, the Monte Carlo might over estimate the mismatch. In spectre, you can set the correlation ranging from 0 to 0.99 and it is affecting my simulation results. Did you set your Monte Carlo simulation to simulate mismatch? I was doing that to find out the offset voltage for an OPAMP and it works fine for me. Regards, Chase |
Title: Re: Some confusion about Monte Carlo simulation Post by Jet_Wu on Apr 21st, 2006, 11:27pm Thanks for the reply, I found the correlation setting (.CORREL) in eldo manual just now. Some question further: how to choose the correlation coefficients, it seems too empirically. |
Title: Re: Some confusion about Monte Carlo simulation Post by Paul on Apr 22nd, 2006, 5:53am Hi, the correlation to be set depends on the mismatch parameters in your model. In most cases, these are extracted for nearby matched devices (same orientation, shape and size etc.). In that case, the correlation effect is already taken care of in the parameters and MC would underestimate mismatch for distant or badly matched devices. If I remember correctly, correlation > 0 lowers the effectively applied mismatch between two devices, so a high correlation parameter (i.e. close to 1) may result in underestimated offset results. The electrical parameter manual coming with the device models should contain information on the assumptions made during the mismatch parameter extraction and the use of the correlation parameter. Paul |
Title: Re: Some confusion about Monte Carlo simulation Post by sheldon on Apr 22nd, 2006, 8:34pm Greetings, The Spectre implementation of correlation is outlined in the Modeling section of the Designer's Guide, http://www.designers-guide.org/Modeling/montecarlo.pdf In the past, I have not used correlation because the foundry calculated mismatch based on the assumption of matched pairs, that is, correlation was built into the model parameters. This approach worked except when a design had matched devices that were not placed properly. In that case, Monte Carlo produced results were in error. Since we had built our trim structure based on the Monte Carlo projections for mismatch, it meant an all-level mask spin to fix device placements. Best Regards, Sheldon |
Title: Re: Some confusion about Monte Carlo simulation Post by RobG on Apr 28th, 2006, 7:39am Jet_Wu wrote on Apr 21st, 2006, 10:42am:
Monte Carlo doesn't overestimate. Believe it or not, poor layout techniques don't affect the variance (or standard deviation) of Vt mismatch much, at least not on a single wafer were matching parameters would be measured. I've even seen matching between devices with a 90 degree rotation and the difference is small (I think the mobility mismatch does increase, however, and different lots may produce different mean values). What happens is an unpredictable systematic offset is introduced, so it is obviously a bad idea to use "unmatched layouts." Anyway, generally you can assume that using common centroid layouts, dummy devices, etc, won't buy you much in terms of reduced standard deviation, but it will properly center your design. |
Title: Re: Some confusion about Monte Carlo simulation Post by Paul on Apr 29th, 2006, 5:56am Sorry Rob, but I disagree on the form of your post. You may be correct that umatched layout introduces offsets and not variation, I believe that your post may be confusing for less experienced designers! You should not encourage them to disrespect matching guidelines, because it may introduce multiple problems in their designs. Indeed, matching rules are not only targeting Vt mismatches. In differential pairs, which you would usually bias in moderate or weak inversion, mobility mismatch is the dominant contribution to the overall device mismatch. Further more, orientation shall provide robustness agains thermal gradients, possibly also against residual substrate currents (in case you have vertical bipolar devices in your design). Obviously these factors may vary over time and appear as a time-dependent offset component. In this sense, please don't overstress the fact that poor matching results in offset only, it may be misleading. Best, Paul |
Title: Re: Some confusion about Monte Carlo simulation Post by RobG on Apr 30th, 2006, 11:58am Paul, I think yer bored and needed something to post :-). I was worried that people might get the idea that common centroids weren't needed so I mentioned that they were useful not once, but twice. I was going to mention thermal gradients, but it just seemed to be getting more off topic to give yet another reason. By the way, you forgot temperature dependent stess, esp. in plastic packages. ;) The main point was to answer the question, and to give the reason why. Monte Carlo isn't pessimistic; you shouldn't expect common centroid to decrease the random offsets caused by device mismatch - that is just an oft repeated myth. Anyway, are you sure you didn't mean VT mismatch in the post below? The effect of mobility mismatch in a diff pair is minimized by biasing in weak inversion, whereas the effects of VT mismatch is bias independent (for a diff pair). Paul wrote on Apr 29th, 2006, 5:56am:
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Title: Re: Some confusion about Monte Carlo simulation Post by Paul on May 1st, 2006, 12:15pm Hi Rob, I have seen people misinterpreting statements like the one in your post and claiming that matched layout was not important. I couldn't simply leave this statement without comment... Nevertheless, you are right correcting me on the diff pair. Obviously I messed up my post, a diff pair is sensitive to Vt mismatch while a strong inversion current mirror is mostly sensitive to mobility mismatch. Sorry for the confusion, I must have been tired :-[ Best Paul |
Title: Re: Some confusion about Monte Carlo simulation Post by vivkr on May 2nd, 2006, 12:11am Hi Paul, Rob, I would like to add one comment to the discussion: While it is true that current mirror mismatch in strong inversion depends on mobility mismatch, the level of inversion required to attain the state where mobility mismatch dominates over VT mismatch may be quite high, high enough that one never encounters it. Perhaps this is a process dependent thing, but I remember doing a calculation long ago with one of the processes I was using, and with information about VT mismatch and mobility mismatch based on measurements of well-matched devices, I found that the (VGS-VT) level needed to be about 2x the maximum operating VGS allowed in the process. So for all practical purposes, mobility mismatch was negligible. I would advice everyone to first write out a simple equation for estimating the sensitivity (dI/I) based on VT and mobility mismatch values, and to plug in the numbers from their respective process docs to see the dominant source of mismatch. I typically allow >= 1V (VGS-VT) and use long channel devices in a 3.3V process for realizing current mirrors, wherever possible. Regards Vivek |
Title: Re: Some confusion about Monte Carlo simulation Post by RobG on May 2nd, 2006, 7:38am vivkr wrote on May 2nd, 2006, 12:11am:
Vivkr... that is a good comment of which I agree. Someone confused the issue by saying mobility mismatch was important for diff pairs ;D Supposedly, as processes get smaller, it will take less overdrive (i.e. Vgs-Vt) for the mobility mismatch to dominate over mismatch. At the same time, supplies will go down (so max Vgs-Vt will also go down), so I don't know if mobility mismatch will ever dominate... On the other hand, stresses, such as those found in plastic packaging, increase mobility mismatch. At one time I needed a 10 fold increase in σ(Δμ/μ) to explain the temperature drift I saw when moving a chip into a plastic package. So, under some conditions it can be very important, especially in explaining temperature drift. rg |
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