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Design >> Analog Design >> opamp gain requirement in delta-sigma ADCs
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Message started by vivkr on May 15^th, 2006, 3:51am

Title: opamp gain requirement in delta-sigma ADCs
Post by vivkr on May 15^th, 2006, 3:51am

Hi,

I often come across the statement "The gain of the first opamp in a delta-sigma ADC need not be very high,
as long as it is guaranteed that the gain is constant across the entire input range" or "...if the stage gain
is linear".

I refer only to single-loop modulators here as the situation is simpler to analyze there. For cascaded modulators,
there are other issues which dictate the gain level.

However, the important point is to guarantee the above condition without designing the opamp
for a high enough gain. For instance, if you are designing a modulator with 120 dB dynamic range, and your opamp
only has 80 dB gain, how can you be sure that your stage linearity is 120 dB? In principle, if the gain was finite but
fixed with respect to output voltage level, then there would be no issue, as one would only see a net gain error.

Of course, the nonlinearity (assuming a DC input-output curve)

I have seen several arguments put forward and I summarize them here with my comments:

1. Slewing is the dominant source of nonlinearity since the variable amount of time spent slewing (dependent on
output step) implies that the amount of linear settling timeconstants differ depending on output step. Therefore, if
one uses say a class-AB opamp (Castello-type), the slewing time is independent of the output step, and hence the finite gain
of the opamp is not important.

Comment: DC nonlinearity in the input-output transfer curve of the integrator cannot be guaranteed to be much better than
the gain of the opamp.

2. Opposing view maintains thatthe first stage integrator gain must be as high as the linearity target in order to guarantee
the accuracy.

Comment: I agree with this point, although I can imagine that the actual gain required may be slightly smaller than this limit.
However, in principle, this argument sits well, especially if one looks at the input-output transfer curve, applying a DC input for
one cycle, and looking at the change in the output, assuming zero initial conditions. Of course, the chaotic change of state in a real
modulator makes things slightly different but I have not seen any analysis claiming any "dithering" advantage in terms of linearity.

3. The opamp gain needs to be only as high as the OSR (Boser, Wooley).

Comment: Only considers the sensitivity of the modulator filter coefficients and not linearity effects. Besides, the author (Boser)
himself has written stating that this is too optimistic a gain value to choose, and is owing to the fact that this was one of the first
papers addressing circuit-level issues for delta-sigma design, at a time when knowledge of these circuits was not as well advanced.

What is even more complicated is the fact that earlier, I did design some modulator designs with about 60-70 dB opamp gain, and managed
to get about 80 dB linearity out of the modulator (2nd order). Although I stick with 2., and believe that there is not enough reason to assume
sufficiently robust linear operation without an equal amount of opamp gain, I cannot explain how I see good enough linearity in my modulator.
By the way, it is not clear what the limiting source of linearity is, as it is limited here by the number of bits taken out from the decimation filter.

Any ideas and thoughts on the topic would be very welcome, as would be any references.

Regards
Vivek